[llvm-commits] [llvm] r99549 - /llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp

Evan Cheng evan.cheng at apple.com
Thu Mar 25 13:54:01 PDT 2010


Thanks Jim. But perhaps this can be a subtarget feature specified in ARM.td? For example, x86 has FeatureSlowBTMem which disables uses of certain instructions for specific variants.

Evan

On Mar 25, 2010, at 1:48 PM, Jim Grosbach wrote:

> Author: grosbach
> Date: Thu Mar 25 15:48:50 2010
> New Revision: 99549
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=99549&view=rev
> Log:
> ARM cortex-a8 doesn't do vmla/vmls well. disable them by default for that cpu
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=99549&r1=99548&r2=99549&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Thu Mar 25 15:48:50 2010
> @@ -127,6 +127,12 @@
>     // operations with NEON instructions.
>     if (UseNEONFP.getPosition() == 0)
>       UseNEONForSinglePrecisionFP = true;
> +    // The VFP vlma and vlms instructions don't play nicely with others;
> +    // disable them.
> +    // FIXME: This may be true for other variants as well. Get benchmark
> +    // numbers and add them if determined that's the case.
> +    if (UseVMLxInstructions.getPosition() == 0)
> +      UseVMLx = false;
>   }
> }
> 
> 
> 
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