[llvm-commits] [llvm] r99514 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h include/llvm/IntrinsicsX86.td lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrSSE.td test/MC/AsmParser/X86/x86_32-bit_cat.s test/MC/AsmParser/X86/x86_32-encoding.s
Bob Wilson
bob.wilson at apple.com
Thu Mar 25 09:36:14 PDT 2010
Author: bwilson
Date: Thu Mar 25 11:36:14 2010
New Revision: 99514
URL: http://llvm.org/viewvc/llvm-project?rev=99514&view=rev
Log:
Reapply Kevin's change 94440, now that Chris has fixed the limitation on
opcode values fitting in one byte (svn r99494).
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/Target/X86/X86ISelLowering.h
llvm/trunk/lib/Target/X86/X86InstrSSE.td
llvm/trunk/test/MC/AsmParser/X86/x86_32-bit_cat.s
llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Thu Mar 25 11:36:14 2010
@@ -616,7 +616,7 @@
/// which do not reference a specific memory location should be less than
/// this value. Those that do must not be less than this value, and can
/// be used with SelectionDAG::getMemIntrinsicNode.
- static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+80;
+ static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+85;
/// Node predicates
Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Thu Mar 25 11:36:14 2010
@@ -779,6 +779,25 @@
[IntrNoMem, Commutative]>;
}
+// Advanced Encryption Standard (AES) Instructions
+let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
+ def int_x86_sse42_aesimc :
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_sse42_aesenc :
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_sse42_aesenclast :
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_sse42_aesdec :
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+ def int_x86_sse42_aesdeclast :
+ Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty],
+ [IntrNoMem]>;
+}
+
// Vector pack
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_sse41_packusdw : GCCBuiltin<"__builtin_ia32_packusdw128">,
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu Mar 25 11:36:14 2010
@@ -234,6 +234,9 @@
PCMPEQB, PCMPEQW, PCMPEQD, PCMPEQQ,
PCMPGTB, PCMPGTW, PCMPGTD, PCMPGTQ,
+ // Advanced Encryption Standard (AES) Instructions
+ AESIMC, AESENC, AESENCLAST, AESDEC, AESDECLAST,
+
// ADD, SUB, SMUL, UMUL, etc. - Arithmetic operations with FLAGS results.
ADD, SUB, SMUL, UMUL,
INC, DEC, OR, XOR, AND,
Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Mar 25 11:36:14 2010
@@ -69,6 +69,12 @@
def X86pcmpgtd : SDNode<"X86ISD::PCMPGTD", SDTIntBinOp>;
def X86pcmpgtq : SDNode<"X86ISD::PCMPGTQ", SDTIntBinOp>;
+def X86aesimc : SDNode<"X86ISD::AESIMC", SDTIntBinOp>;
+def X86aesenc : SDNode<"X86ISD::AESENC", SDTIntBinOp>;
+def X86aesenclast : SDNode<"X86ISD::AESENCLAST", SDTIntBinOp>;
+def X86aesdec : SDNode<"X86ISD::AESDEC", SDTIntBinOp>;
+def X86aesdeclast : SDNode<"X86ISD::AESDECLAST", SDTIntBinOp>;
+
def SDTX86CmpPTest : SDTypeProfile<0, 2, [SDTCisVT<0, v4f32>,
SDTCisVT<1, v4f32>]>;
def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
@@ -3817,6 +3823,45 @@
def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
(PCMPGTQrm VR128:$src1, addr:$src2)>;
+defm AESIMC : SS42I_binop_rm_int<0xDB, "aesimc",
+ int_x86_sse42_aesimc>;
+defm AESENC : SS42I_binop_rm_int<0xDC, "aesenc",
+ int_x86_sse42_aesenc>;
+defm AESENCLAST : SS42I_binop_rm_int<0xDD, "aesenclast",
+ int_x86_sse42_aesenclast>;
+defm AESDEC : SS42I_binop_rm_int<0xDE, "aesdec",
+ int_x86_sse42_aesdec>;
+defm AESDECLAST : SS42I_binop_rm_int<0xDF, "aesdeclast",
+ int_x86_sse42_aesdeclast>;
+
+def : Pat<(v2i64 (X86aesimc VR128:$src1, VR128:$src2)),
+ (AESIMCrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesimc VR128:$src1, (memop addr:$src2))),
+ (AESIMCrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesenc VR128:$src1, VR128:$src2)),
+ (AESENCrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesenc VR128:$src1, (memop addr:$src2))),
+ (AESENCrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesenclast VR128:$src1, VR128:$src2)),
+ (AESENCLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesenclast VR128:$src1, (memop addr:$src2))),
+ (AESENCLASTrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesdec VR128:$src1, VR128:$src2)),
+ (AESDECrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesdec VR128:$src1, (memop addr:$src2))),
+ (AESDECrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesdeclast VR128:$src1, VR128:$src2)),
+ (AESDECLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesdeclast VR128:$src1, (memop addr:$src2))),
+ (AESDECLASTrm VR128:$src1, addr:$src2)>;
+
+def AESKEYGENASSIST128rr : SS42AI<0xDF, MRMSrcReg, (outs),
+ (ins VR128:$src1, VR128:$src2, i8imm:$src3),
+ "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
+def AESKEYGENASSIST128rm : SS42AI<0xDF, MRMSrcMem, (outs),
+ (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
+ "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
+
// crc intrinsic instruction
// This set of instructions are only rm, the only difference is the size
// of r and m.
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_32-bit_cat.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_32-bit_cat.s?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_32-bit_cat.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_32-bit_cat.s Thu Mar 25 11:36:14 2010
@@ -7806,3 +7806,39 @@
// CHECK: pcmpgtq %xmm5, %xmm5
pcmpgtq %xmm5,%xmm5
+
+// CHECK: aesimc %xmm0, %xmm1
+ aesimc %xmm0,%xmm1
+
+// CHECK: aesimc (%eax), %xmm1
+ aesimc (%eax),%xmm1
+
+// CHECK: aesenc %xmm1, %xmm2
+ aesenc %xmm1,%xmm2
+
+// CHECK: aesenc 4(%ebx), %xmm2
+ aesenc 4(%ebx),%xmm2
+
+// CHECK: aesenclast %xmm3, %xmm4
+ aesenclast %xmm3,%xmm4
+
+// CHECK: aesenclast 4(%edx,%edi), %xmm4
+ aesenclast 4(%edx,%edi),%xmm4
+
+// CHECK: aesdec %xmm5, %xmm6
+ aesdec %xmm5,%xmm6
+
+// CHECK: aesdec 4(%ecx,%eax,8), %xmm6
+ aesdec 4(%ecx,%eax,8),%xmm6
+
+// CHECK: aesdeclast %xmm7, %xmm0
+ aesdeclast %xmm7,%xmm0
+
+// CHECK: aesdeclast 3405691582, %xmm0
+ aesdeclast 0xcafebabe,%xmm0
+
+// CHECK: aeskeygenassist $125, %xmm1, %xmm2
+ aeskeygenassist $125, %xmm1, %xmm2
+
+// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2
+ aeskeygenassist $125, (%edx,%eax,4), %xmm2
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s?rev=99514&r1=99513&r2=99514&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_32-encoding.s Thu Mar 25 11:36:14 2010
@@ -9913,3 +9913,51 @@
// CHECK: pcmpistrm $125, (%edx,%eax,4), %xmm2
// CHECK: encoding: [0x66,0x0f,0x3a,0x62,0x14,0x82,0x7d]
pcmpistrm $125, (%edx,%eax,4), %xmm2
+
+// CHECK: aesimc %xmm0, %xmm1
+// CHECK: encoding: [0x66,0x0f,0x38,0xdb,0xc8]
+ aesimc %xmm0,%xmm1
+
+// CHECK: aesimc (%eax), %xmm1
+// CHECK: encoding: [0x66,0x0f,0x38,0xdb,0x08]
+ aesimc (%eax),%xmm1
+
+// CHECK: aesenc %xmm1, %xmm2
+// CHECK: encoding: [0x66,0x0f,0x38,0xdc,0xd1]
+ aesenc %xmm1,%xmm2
+
+// CHECK: aesenc 4(%ebx), %xmm2
+// CHECK: encoding: [0x66,0x0f,0x38,0xdc,0x53,0x04]
+ aesenc 4(%ebx),%xmm2
+
+// CHECK: aesenclast %xmm3, %xmm4
+// CHECK: encoding: [0x66,0x0f,0x38,0xdd,0xe3]
+ aesenclast %xmm3,%xmm4
+
+// CHECK: aesenclast 4(%edx,%edi), %xmm4
+// CHECK: encoding: [0x66,0x0f,0x38,0xdd,0x64,0x3a,0x04]
+ aesenclast 4(%edx,%edi),%xmm4
+
+// CHECK: aesdec %xmm5, %xmm6
+// CHECK: encoding: [0x66,0x0f,0x38,0xde,0xf5]
+ aesdec %xmm5,%xmm6
+
+// CHECK: aesdec 4(%ecx,%eax,8), %xmm6
+// CHECK: encoding: [0x66,0x0f,0x38,0xde,0x74,0xc1,0x04]
+ aesdec 4(%ecx,%eax,8),%xmm6
+
+// CHECK: aesdeclast %xmm7, %xmm0
+// CHECK: encoding: [0x66,0x0f,0x38,0xdf,0xc7]
+ aesdeclast %xmm7,%xmm0
+
+// CHECK: aesdeclast 3405691582, %xmm0
+// CHECK: encoding: [0x66,0x0f,0x38,0xdf,0x05,0xbe,0xba,0xfe,0xca]
+ aesdeclast 0xcafebabe,%xmm0
+
+// CHECK: aeskeygenassist $125, %xmm1, %xmm2
+// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0xd1,0x7d]
+ aeskeygenassist $125, %xmm1, %xmm2
+
+// CHECK: aeskeygenassist $125, (%edx,%eax,4), %xmm2
+// CHECK: encoding: [0x66,0x0f,0x3a,0xdf,0x14,0x82,0x7d]
+ aeskeygenassist $125, (%edx,%eax,4), %xmm2
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