[llvm-commits] [llvm] r99373 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrNEON.td
Johnny Chen
johnny.chen at apple.com
Tue Mar 23 17:57:50 PDT 2010
Author: johnny
Date: Tue Mar 23 19:57:50 2010
New Revision: 99373
URL: http://llvm.org/viewvc/llvm-project?rev=99373&view=rev
Log:
Renamed NVdVmImmFrm and NVdVmVCVTFrm to the more proper N2RegFrm and NVCVTFrm,
respectively, and add some more comment.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=99373&r1=99372&r2=99373&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Tue Mar 23 19:57:50 2010
@@ -59,10 +59,10 @@
def MiscFrm : Format<29>;
def ThumbMiscFrm : Format<30>;
-def NLdStFrm : Format<31>;
-def N1RegModImmFrm : Format<32>;
-def NVdVmImmFrm : Format<33>;
-def NVdVmVCVTFrm : Format<34>;
+def NLdStFrm : Format<31>;
+def N1RegModImmFrm : Format<32>;
+def N2RegFrm : Format<33>;
+def NVCVTFrm : Format<34>;
// Misc flags.
@@ -1553,7 +1553,7 @@
bits<5> op11_7, bit op6, bit op4,
dag oops, dag iops, InstrItinClass itin,
string opc, string dt, string asm, string cstr, list<dag> pattern>
- : NDataI<oops, iops, NVdVmImmFrm, itin, opc, dt, asm, cstr, pattern> {
+ : NDataI<oops, iops, N2RegFrm, itin, opc, dt, asm, cstr, pattern> {
let Inst{24-23} = op24_23;
let Inst{21-20} = op21_20;
let Inst{19-18} = op19_18;
@@ -1568,7 +1568,7 @@
bits<5> op11_7, bit op6, bit op4,
dag oops, dag iops, InstrItinClass itin,
string opc, string asm, string cstr, list<dag> pattern>
- : NDataXI<oops, iops, NVdVmImmFrm, itin, opc, asm, cstr, pattern> {
+ : NDataXI<oops, iops, N2RegFrm, itin, opc, asm, cstr, pattern> {
let Inst{24-23} = op24_23;
let Inst{21-20} = op21_20;
let Inst{19-18} = op19_18;
Modified: llvm/trunk/lib/Target/ARM/ARMInstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrNEON.td?rev=99373&r1=99372&r2=99373&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrNEON.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrNEON.td Tue Mar 23 19:57:50 2010
@@ -853,7 +853,7 @@
// Instruction Classes
//===----------------------------------------------------------------------===//
-// Same as N2V except that it doesn't pass a default NVdVmImmFrm to NDataI.
+// Same as N2V except that it doesn't pass a default N2RegFrm to NDataI.
class N2V2<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18, bits<2> op17_16,
bits<5> op11_7, bit op6, bit op4,
dag oops, dag iops, Format f, InstrItinClass itin,
@@ -869,24 +869,24 @@
}
// Basic 2-register operations: single-, double- and quad-register.
-// This is used for NVdVmVCVTFrm form.
+// This is used for NVCVTFrm form.
class N2VS<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
: N2V2<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4,
- (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), NVdVmVCVTFrm,
+ (outs DPR_VFP2:$dst), (ins DPR_VFP2:$src), NVCVTFrm,
IIC_VUNAD, OpcodeStr, Dt, "$dst, $src", "", []>;
class N2VD<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
: N2V2<op24_23, op21_20, op19_18, op17_16, op11_7, 0, op4, (outs DPR:$dst),
- (ins DPR:$src), NVdVmVCVTFrm, IIC_VUNAD, OpcodeStr, Dt,"$dst, $src","",
+ (ins DPR:$src), NVCVTFrm, IIC_VUNAD, OpcodeStr, Dt,"$dst, $src","",
[(set DPR:$dst, (ResTy (OpNode (OpTy DPR:$src))))]>;
class N2VQ<bits<2> op24_23, bits<2> op21_20, bits<2> op19_18,
bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr,
string Dt, ValueType ResTy, ValueType OpTy, SDNode OpNode>
: N2V2<op24_23, op21_20, op19_18, op17_16, op11_7, 1, op4, (outs QPR:$dst),
- (ins QPR:$src), NVdVmVCVTFrm, IIC_VUNAQ, OpcodeStr, Dt,"$dst, $src","",
+ (ins QPR:$src), NVCVTFrm, IIC_VUNAQ, OpcodeStr, Dt,"$dst, $src","",
[(set QPR:$dst, (ResTy (OpNode (OpTy QPR:$src))))]>;
// Basic 2-register intrinsics, both double- and quad-register.
More information about the llvm-commits
mailing list