[llvm-commits] [llvm] r98679 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td ARMInstrVFP.td

[Bob Wilson]

These variants are already distinguished by IndexModeNone vs. IndexModeUpd.  Can you use that distinction to determine the writeback bit?

On Mar 16, 2010, at 2:25 PM, Johnny Chen wrote:

> Author: johnny
> Date: Tue Mar 16 16:25:05 2010
> New Revision: 98679
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=98679&view=rev
> Log:
> Disambiguate the *_UPD  and * variants by specifying the writeback flag as 1.
> This is for the disassembly work.
> 
> There are cases where this is not possible, for example, A8.6.53 LDM Encoding T1.
> In such case, we'll use an adhoc approach to deduce the Opcode programmatically.
> 
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>    llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=98679&r1=98678&r2=98679&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Mar 16 16:25:05 2010
> @@ -1355,7 +1355,9 @@
>                                       reglist:$dsts, variable_ops),
>                      IndexModeUpd, LdStMulFrm, IIC_iLoadm,
>                      "ldm${addr:submode}${p}\t$addr!, $dsts",
> -                     "$addr.addr = $wb", []>;
> +                     "$addr.addr = $wb", []> {
> +  let Inst{21} = 1; // wback
> +}
> } // mayLoad, hasExtraDefRegAllocReq
> 
> let mayStore = 1, hasExtraSrcRegAllocReq = 1 in {
> @@ -1368,7 +1370,9 @@
>                                       reglist:$srcs, variable_ops),
>                      IndexModeUpd, LdStMulFrm, IIC_iStorem,
>                      "stm${addr:submode}${p}\t$addr!, $srcs",
> -                     "$addr.addr = $wb", []>;
> +                     "$addr.addr = $wb", []> {
> +  let Inst{21} = 1; // wback
> +}
> } // mayStore, hasExtraSrcRegAllocReq
> 
> //===----------------------------------------------------------------------===//
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=98679&r1=98678&r2=98679&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Mar 16 16:25:05 2010
> @@ -96,6 +96,7 @@
>                       IndexModeUpd, IIC_fpLoadm,
>                       "vldm${addr:submode}${p}\t${addr:base}!, $dsts",
>                       "$addr.base = $wb", []> {
> +  let Inst{21} = 1; // wback
>   let Inst{20} = 1;
> }
> 
> @@ -104,6 +105,7 @@
>                       IndexModeUpd, IIC_fpLoadm, 
>                       "vldm${addr:submode}${p}\t${addr:base}!, $dsts",
>                       "$addr.base = $wb", []> {
> +  let Inst{21} = 1; // wback
>   let Inst{20} = 1;
> }
> } // mayLoad, hasExtraDefRegAllocReq
> @@ -126,6 +128,7 @@
>                       IndexModeUpd, IIC_fpStorem,
>                       "vstm${addr:submode}${p}\t${addr:base}!, $srcs",
>                       "$addr.base = $wb", []> {
> +  let Inst{21} = 1; // wback
>   let Inst{20} = 0;
> }
> 
> @@ -134,6 +137,7 @@
>                       IndexModeUpd, IIC_fpStorem,
>                       "vstm${addr:submode}${p}\t${addr:base}!, $srcs",
>                       "$addr.base = $wb", []> {
> +  let Inst{21} = 1; // wback
>   let Inst{20} = 0;
> }
> } // mayStore, hasExtraSrcRegAllocReq
> 
> 
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