[llvm-commits] [llvm] r98512 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp test/CodeGen/X86/crash.ll

[Chris Lattner]

Author: lattner
Date: Sun Mar 14 14:46:02 2010
New Revision: 98512

URL: http://llvm.org/viewvc/llvm-project?rev=98512&view=rev
Log:
fix ShrinkDemandedOps to not leave dead nodes around,
fixing PR6607

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/test/CodeGen/X86/crash.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=98512&r1=98511&r2=98512&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Sun Mar 14 14:46:02 2010
@@ -509,6 +509,12 @@
     InWorklist.erase(N);
 
     if (N->use_empty() && N != CurDAG->getRoot().getNode()) {
+      // Deleting this node may make its operands dead, add them to the worklist
+      // if they aren't already there.
+      for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
+        if (InWorklist.insert(N->getOperand(i).getNode()))
+          Worklist.push_back(N->getOperand(i).getNode());
+      
       CurDAG->DeleteNode(N);
       continue;
     }

Modified: llvm/trunk/test/CodeGen/X86/crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/crash.ll?rev=98512&r1=98511&r2=98512&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/crash.ll Sun Mar 14 14:46:02 2010
@@ -71,3 +71,22 @@
 }
 
 declare i32 @safe(i32)
+
+; PR6607
+define fastcc void @test5(i32 %FUNC) nounwind {
+foo:
+  %0 = load i8* undef, align 1                    ; <i8> [#uses=3]
+  %1 = sext i8 %0 to i32                          ; <i32> [#uses=2]
+  %2 = zext i8 %0 to i32                          ; <i32> [#uses=1]
+  %tmp1.i5037 = urem i32 %2, 10                   ; <i32> [#uses=1]
+  %tmp.i5038 = icmp ugt i32 %tmp1.i5037, 15       ; <i1> [#uses=1]
+  %3 = zext i1 %tmp.i5038 to i8                   ; <i8> [#uses=1]
+  %4 = icmp slt i8 %0, %3                         ; <i1> [#uses=1]
+  %5 = add nsw i32 %1, 256                        ; <i32> [#uses=1]
+  %storemerge.i.i57 = select i1 %4, i32 %5, i32 %1 ; <i32> [#uses=1]
+  %6 = shl i32 %storemerge.i.i57, 16              ; <i32> [#uses=1]
+  %7 = sdiv i32 %6, -256                          ; <i32> [#uses=1]
+  %8 = trunc i32 %7 to i8                         ; <i8> [#uses=1]
+  store i8 %8, i8* undef, align 1
+  ret void
+}