[llvm-commits] [llvm] r98007 - /llvm/trunk/lib/CodeGen/MachineCSE.cpp

[Jakob Stoklund Olesen]

On Mar 8, 2010, at 3:28 PM, Evan Cheng wrote:

> Author: evancheng
> Date: Mon Mar  8 17:28:08 2010
> New Revision: 98007
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=98007&view=rev
> Log:
> Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
> 
> Modified:
>    llvm/trunk/lib/CodeGen/MachineCSE.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/MachineCSE.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineCSE.cpp?rev=98007&r1=98006&r2=98007&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/MachineCSE.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineCSE.cpp Mon Mar  8 17:28:08 2010
> @@ -91,7 +91,10 @@
>     unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
>     if (TII->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
>         TargetRegisterInfo::isVirtualRegister(SrcReg) &&
> +        MRI->getRegClass(SrcReg) == MRI->getRegClass(Reg) &&
>         !SrcSubIdx && !DstSubIdx) {
> +      DEBUG(dbgs() << "Coalescing: " << *DefMI);
> +      DEBUG(dbgs() << "*** to: " << *MI);
>       MO.setReg(SrcReg);
>       DefMI->eraseFromParent();
>       ++NumCoalesces;

You could add "|| MRI->getRegClass(Reg)->hasSubClass(MRI->getRegClass(SrcReg))" without getting too complicated. That could help a bit with the few x86_64 subclasses as well.