[llvm-commits] [llvm] r97877 - in /llvm/trunk: lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp test/CodeGen/MSP430/AddrMode-bis-rx.ll test/CodeGen/MSP430/AddrMode-bis-xr.ll test/CodeGen/MSP430/AddrMode-mov-rx.ll test/CodeGen/MSP430/AddrMode-mov-xr.ll
Anton Korobeynikov
asl at math.spbu.ru
Sat Mar 6 03:41:13 PST 2010
Author: asl
Date: Sat Mar 6 05:41:12 2010
New Revision: 97877
URL: http://llvm.org/viewvc/llvm-project?rev=97877&view=rev
Log:
Do not use '&' prefix for globals when register base field is non-zero, otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
This fixes PR6349
Modified:
llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp
llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp
llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-rx.ll
llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-xr.ll
llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-rx.ll
llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-xr.ll
Modified: llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430AsmPrinter.cpp Sat Mar 6 05:41:12 2010
@@ -98,12 +98,19 @@
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
uint64_t Offset = MO.getOffset();
- O << (isMemOp ? '&' : '#');
+ // If the global address expression is a part of displacement field with a
+ // register base, we should not emit any prefix symbol here, e.g.
+ // mov.w &foo, r1
+ // vs
+ // mov.w glb(r1), r2
+ // Otherwise (!) msp430-as will silently miscompile the output :(
+ if (!Modifier || strcmp(Modifier, "nohash"))
+ O << (isMemOp ? '&' : '#');
if (Offset)
O << '(' << Offset << '+';
O << *GetGlobalValueSymbol(MO.getGlobal());
-
+
if (Offset)
O << ')';
@@ -124,15 +131,11 @@
const MachineOperand &Disp = MI->getOperand(OpNum+1);
// Print displacement first
- if (!Disp.isImm()) {
- printOperand(MI, OpNum+1, "mem");
- } else {
- if (!Base.getReg())
- O << '&';
-
- printOperand(MI, OpNum+1, "nohash");
- }
+ // Imm here is in fact global address - print extra modifier.
+ if (Disp.isImm() && !Base.getReg())
+ O << '&';
+ printOperand(MI, OpNum+1, "nohash");
// Print register base field
if (Base.getReg()) {
Modified: llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/AsmPrinter/MSP430InstPrinter.cpp Sat Mar 6 05:41:12 2010
@@ -62,21 +62,26 @@
const MCOperand &Disp = MI->getOperand(OpNo+1);
// Print displacement first
- if (Disp.isExpr()) {
- O << '&' << *Disp.getExpr();
- } else {
- assert(Disp.isImm() && "Expected immediate in displacement field");
- if (!Base.getReg())
- O << '&';
+ // If the global address expression is a part of displacement field with a
+ // register base, we should not emit any prefix symbol here, e.g.
+ // mov.w &foo, r1
+ // vs
+ // mov.w glb(r1), r2
+ // Otherwise (!) msp430-as will silently miscompile the output :(
+ if (!Base.getReg())
+ O << '&';
+
+ if (Disp.isExpr())
+ O << *Disp.getExpr();
+ else {
+ assert(Disp.isImm() && "Expected immediate in displacement field");
O << Disp.getImm();
}
-
// Print register base field
- if (Base.getReg()) {
+ if (Base.getReg())
O << '(' << getRegisterName(Base.getReg()) << ')';
- }
}
void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo) {
Modified: llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-rx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-rx.ll?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-rx.ll (original)
+++ llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-rx.ll Sat Mar 6 05:41:12 2010
@@ -29,7 +29,7 @@
ret i8 %3
}
; CHECK: am3:
-; CHECK: bis.b &bar(r14), r15
+; CHECK: bis.b bar(r14), r15
define i16 @am4(i16 %x) nounwind {
%1 = volatile load i16* inttoptr(i16 32 to i16*)
@@ -70,5 +70,5 @@
ret i8 %4
}
; CHECK: am7:
-; CHECK: bis.b &duh+2(r14), r15
+; CHECK: bis.b duh+2(r14), r15
Modified: llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-xr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-xr.ll?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-xr.ll (original)
+++ llvm/trunk/test/CodeGen/MSP430/AddrMode-bis-xr.ll Sat Mar 6 05:41:12 2010
@@ -32,7 +32,7 @@
ret void
}
; CHECK: am3:
-; CHECK: bis.b r14, &bar(r15)
+; CHECK: bis.b r14, bar(r15)
define void @am4(i16 %x) nounwind {
%1 = volatile load i16* inttoptr(i16 32 to i16*)
@@ -77,5 +77,5 @@
ret void
}
; CHECK: am7:
-; CHECK: bis.b r14, &duh+2(r15)
+; CHECK: bis.b r14, duh+2(r15)
Modified: llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-rx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-rx.ll?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-rx.ll (original)
+++ llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-rx.ll Sat Mar 6 05:41:12 2010
@@ -26,7 +26,7 @@
ret i8 %2
}
; CHECK: am3:
-; CHECK: mov.b &bar(r15), r15
+; CHECK: mov.b bar(r15), r15
define i16 @am4() nounwind {
%1 = volatile load i16* inttoptr(i16 32 to i16*)
@@ -63,5 +63,5 @@
ret i8 %3
}
; CHECK: am7:
-; CHECK: mov.b &duh+2(r15), r15
+; CHECK: mov.b duh+2(r15), r15
Modified: llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-xr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-xr.ll?rev=97877&r1=97876&r2=97877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-xr.ll (original)
+++ llvm/trunk/test/CodeGen/MSP430/AddrMode-mov-xr.ll Sat Mar 6 05:41:12 2010
@@ -26,7 +26,7 @@
ret void
}
; CHECK: am3:
-; CHECK: mov.b r14, &bar(r15)
+; CHECK: mov.b r14, bar(r15)
define void @am4(i16 %a) nounwind {
volatile store i16 %a, i16* inttoptr(i16 32 to i16*)
@@ -63,5 +63,5 @@
ret void
}
; CHECK: am7:
-; CHECK: mov.b r14, &duh+2(r15)
+; CHECK: mov.b r14, duh+2(r15)
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