[llvm-commits] [llvm] r96654 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Johnny Chen johnny.chen at apple.com
Thu Feb 18 18:12:06 PST 2010


Author: johnny
Date: Thu Feb 18 20:12:06 2010
New Revision: 96654

URL: http://llvm.org/viewvc/llvm-project?rev=96654&view=rev
Log:
Added entries for ASR, LSL, LSR, ROR, and RRX so that the disassembler prints
out the canonical form (A8.6.98) instead of the pseudo-instruction as provided
via MOVs.

DBG_ARM_DISASM=YES llvm-mc -triple=arm-unknown-unknown --disassemble
0xc0 0x00 0xa0 0xe1
Opcode=29 Name=ASR Format=ARM_FORMAT_LDMISCFRM
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------

	asr	r0, r0, #1

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=96654&r1=96653&r2=96654&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Feb 18 20:12:06 2010
@@ -1278,6 +1278,30 @@
                  "mov", "\t$dst, $src, rrx",
                  [(set GPR:$dst, (ARMrrx GPR:$src))]>, UnaryDP;
 
+//===----------------------------------------------------------------------===//
+//  Shift Instructions.
+//
+//  These are for disassembly only.  See also MOVs above.
+
+class AShI<string opc, bits<2> type>
+  : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src, am3offset:$offset), LdMiscFrm,
+         IIC_iMOVsr, opc, "\t$dst, $src, $offset", []>, UnaryDP {
+  let Inst{6-5} = type;
+  let Inst{25} = 0;
+}
+
+def LSL : AShI<"lsl", 0b00>;
+def LSR : AShI<"lsr", 0b01>;
+def ASR : AShI<"asr", 0b10>;
+def ROR : AShI<"ror", 0b11>;
+
+def RRX : AsI1<0b1101, (outs GPR:$dst), (ins GPR:$src), LdMiscFrm, IIC_iMOVsr,
+               "rrx", "\t$dst, $src", []>, UnaryDP {
+  let Inst{25} = 0;
+  let Inst{11-7} = 0b00000;
+  let Inst{6-4} = 0b110;
+}
+
 // These aren't really mov instructions, but we have to define them this way
 // due to flag operands.
 





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