[llvm-commits] [llvm] r96058 - in /llvm/trunk: lib/Target/X86/X86Instr64bit.td lib/Target/X86/X86InstrFormats.td lib/Target/X86/X86InstrInfo.h lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86MCCodeEmitter.cpp test/MC/AsmParser/X86/x86_32-new-encoder.s test/MC/Disassembler/simple-tests.txt utils/TableGen/X86RecognizableInstr.cpp
Chris Lattner
sabre at nondot.org
Fri Feb 12 16:41:15 PST 2010
Author: lattner
Date: Fri Feb 12 18:41:14 2010
New Revision: 96058
URL: http://llvm.org/viewvc/llvm-project?rev=96058&view=rev
Log:
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
fix swapgs to be spelled right.
Modified:
llvm/trunk/lib/Target/X86/X86Instr64bit.td
llvm/trunk/lib/Target/X86/X86InstrFormats.td
llvm/trunk/lib/Target/X86/X86InstrInfo.h
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
llvm/trunk/test/MC/AsmParser/X86/x86_32-new-encoder.s
llvm/trunk/test/MC/Disassembler/simple-tests.txt
llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Fri Feb 12 18:41:14 2010
@@ -1774,7 +1774,7 @@
def LSL64rr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
"lsl{q}\t{$src, $dst|$dst, $src}", []>, TB;
-def SWPGS : I<0x01, RawFrm, (outs), (ins), "swpgs", []>, TB;
+def SWAPGS : I<0x01, MRM_F8, (outs), (ins), "swapgs", []>, TB;
def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins),
"push{q}\t%fs", []>, TB;
Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Fri Feb 12 18:41:14 2010
@@ -30,10 +30,14 @@
def MRM6m : Format<30>; def MRM7m : Format<31>;
def MRMInitReg : Format<32>;
def MRM_C1 : Format<33>;
-def MRM_C8 : Format<34>;
-def MRM_C9 : Format<35>;
-def MRM_E8 : Format<36>;
-def MRM_F0 : Format<37>;
+def MRM_C2 : Format<34>;
+def MRM_C3 : Format<35>;
+def MRM_C4 : Format<36>;
+def MRM_C8 : Format<37>;
+def MRM_C9 : Format<38>;
+def MRM_E8 : Format<39>;
+def MRM_F0 : Format<40>;
+def MRM_F8 : Format<41>;
// ImmType - This specifies the immediate type used by an instruction. This is
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Fri Feb 12 18:41:14 2010
@@ -271,10 +271,14 @@
//// MRM_C1 - A mod/rm byte of exactly 0xC1.
MRM_C1 = 33,
- MRM_C8 = 34,
- MRM_C9 = 35,
- MRM_E8 = 36,
- MRM_F0 = 37,
+ MRM_C2 = 34,
+ MRM_C3 = 35,
+ MRM_C4 = 36,
+ MRM_C8 = 37,
+ MRM_C9 = 38,
+ MRM_E8 = 39,
+ MRM_F0 = 40,
+ MRM_F8 = 41,
FormMask = 63,
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Feb 12 18:41:14 2010
@@ -4247,9 +4247,9 @@
def VMCLEARm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
"vmclear\t$vmcs", []>, OpSize, TB;
// 0F 01 C2
-def VMLAUNCH : I<0x01, RawFrm, (outs), (ins), "vmlaunch", []>, TB;
+def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB;
// 0F 01 C3
-def VMRESUME : I<0x01, RawFrm, (outs), (ins), "vmresume", []>, TB;
+def VMRESUME : I<0x01, MRM_C3, (outs), (ins), "vmresume", []>, TB;
def VMPTRLDm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
"vmptrld\t$vmcs", []>, TB;
def VMPTRSTm : I<0xC7, MRM7m, (outs i64mem:$vmcs), (ins),
@@ -4271,7 +4271,7 @@
def VMWRITE32rr : I<0x79, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
"vmwrite{l}\t{$src, $dst|$dst, $src}", []>, TB;
// 0F 01 C4
-def VMXOFF : I<0x01, RawFrm, (outs), (ins), "vmxoff", []>, OpSize;
+def VMXOFF : I<0x01, MRM_C4, (outs), (ins), "vmxoff", []>, TB;
def VMXON : I<0xC7, MRM6m, (outs), (ins i64mem:$vmxon),
"vmxon\t{$vmxon}", []>, XD;
Modified: llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCCodeEmitter.cpp Fri Feb 12 18:41:14 2010
@@ -585,6 +585,18 @@
EmitByte(BaseOpcode, CurByte, OS);
EmitByte(0xC1, CurByte, OS);
break;
+ case X86II::MRM_C2:
+ EmitByte(BaseOpcode, CurByte, OS);
+ EmitByte(0xC2, CurByte, OS);
+ break;
+ case X86II::MRM_C3:
+ EmitByte(BaseOpcode, CurByte, OS);
+ EmitByte(0xC3, CurByte, OS);
+ break;
+ case X86II::MRM_C4:
+ EmitByte(BaseOpcode, CurByte, OS);
+ EmitByte(0xC4, CurByte, OS);
+ break;
case X86II::MRM_C8:
EmitByte(BaseOpcode, CurByte, OS);
EmitByte(0xC8, CurByte, OS);
@@ -601,6 +613,10 @@
EmitByte(BaseOpcode, CurByte, OS);
EmitByte(0xF0, CurByte, OS);
break;
+ case X86II::MRM_F8:
+ EmitByte(BaseOpcode, CurByte, OS);
+ EmitByte(0xF8, CurByte, OS);
+ break;
}
// If there is a remaining operand, it must be a trailing immediate. Emit it
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_32-new-encoder.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_32-new-encoder.s?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_32-new-encoder.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_32-new-encoder.s Fri Feb 12 18:41:14 2010
@@ -11,4 +11,20 @@
// CHECK: encoding: [0x0f,0x01,0xc8]
mwait
// CHECK: mwait
-// CHECK: encoding: [0x0f,0x01,0xc9]
\ No newline at end of file
+// CHECK: encoding: [0x0f,0x01,0xc9]
+
+ vmcall
+// CHECK: vmcall
+// CHECK: encoding: [0x0f,0x01,0xc1]
+ vmlaunch
+// CHECK: vmlaunch
+// CHECK: encoding: [0x0f,0x01,0xc2]
+ vmresume
+// CHECK: vmresume
+// CHECK: encoding: [0x0f,0x01,0xc3]
+ vmxoff
+// CHECK: vmxoff
+// CHECK: encoding: [0x0f,0x01,0xc4]
+ swapgs
+// CHECK: swapgs
+// CHECK: encoding: [0x0f,0x01,0xf8]
Modified: llvm/trunk/test/MC/Disassembler/simple-tests.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/simple-tests.txt?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/simple-tests.txt (original)
+++ llvm/trunk/test/MC/Disassembler/simple-tests.txt Fri Feb 12 18:41:14 2010
@@ -27,3 +27,15 @@
# CHECK: vmcall
0x0f 0x01 0xc1
+
+# CHECK: vmlaunch
+0x0f 0x01 0xc2
+
+# CHECK: vmresume
+0x0f 0x01 0xc3
+
+# CHECK: vmxoff
+0x0f 0x01 0xc4
+
+# CHECK: swapgs
+0x0f 0x01 0xf8
\ No newline at end of file
Modified: llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp?rev=96058&r1=96057&r2=96058&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp (original)
+++ llvm/trunk/utils/TableGen/X86RecognizableInstr.cpp Fri Feb 12 18:41:14 2010
@@ -26,10 +26,14 @@
#define MRM_MAPPING \
MAP(C1, 33) \
- MAP(C8, 34) \
- MAP(C9, 35) \
- MAP(E8, 36) \
- MAP(F0, 37)
+ MAP(C2, 34) \
+ MAP(C3, 35) \
+ MAP(C4, 36) \
+ MAP(C8, 37) \
+ MAP(C9, 38) \
+ MAP(E8, 39) \
+ MAP(F0, 40) \
+ MAP(F8, 41)
// A clone of X86 since we can't depend on something that is generated.
namespace X86Local {
@@ -591,12 +595,8 @@
return; \
}
- EXACTCASE(TWOBYTE, "SWPGS", 0xf8)
EXACTCASE(TWOBYTE, "INVEPT", 0x80)
EXACTCASE(TWOBYTE, "INVVPID", 0x81)
- EXACTCASE(TWOBYTE, "VMLAUNCH", 0xc2)
- EXACTCASE(TWOBYTE, "VMRESUME", 0xc3)
- EXACTCASE(TWOBYTE, "VMXOFF", 0xc4)
if (Name == "INVLPG") {
tables.setTableFields(TWOBYTE,
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