[llvm-commits] [llvm] r96055 - in /llvm/trunk: lib/Target/X86/AsmParser/X86AsmParser.cpp test/MC/AsmParser/X86/x86_64-new-encoder.s test/MC/AsmParser/X86/x86_instructions.s test/MC/AsmParser/X86/x86_operands.s
Daniel Dunbar
daniel at zuster.org
Fri Feb 12 16:17:21 PST 2010
Author: ddunbar
Date: Fri Feb 12 18:17:21 2010
New Revision: 96055
URL: http://llvm.org/viewvc/llvm-project?rev=96055&view=rev
Log:
MC/X86: Push immediate operands as immediates not expressions when possible.
Modified:
llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s
llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s
llvm/trunk/test/MC/AsmParser/X86/x86_operands.s
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=96055&r1=96054&r2=96055&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Fri Feb 12 18:17:21 2010
@@ -184,6 +184,14 @@
bool isReg() const { return Kind == Register; }
+ void addExpr(MCInst &Inst, const MCExpr *Expr) const {
+ // Add as immediates when possible.
+ if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
+ Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
+ else
+ Inst.addOperand(MCOperand::CreateExpr(Expr));
+ }
+
void addRegOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
Inst.addOperand(MCOperand::CreateReg(getReg()));
@@ -191,13 +199,13 @@
void addImmOperands(MCInst &Inst, unsigned N) const {
assert(N == 1 && "Invalid number of operands!");
- Inst.addOperand(MCOperand::CreateExpr(getImm()));
+ addExpr(Inst, getImm());
}
void addImmSExt8Operands(MCInst &Inst, unsigned N) const {
// FIXME: Support user customization of the render method.
assert(N == 1 && "Invalid number of operands!");
- Inst.addOperand(MCOperand::CreateExpr(getImm()));
+ addExpr(Inst, getImm());
}
void addMemOperands(MCInst &Inst, unsigned N) const {
@@ -205,7 +213,7 @@
Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
Inst.addOperand(MCOperand::CreateImm(getMemScale()));
Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
- Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
+ addExpr(Inst, getMemDisp());
Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
}
@@ -219,7 +227,7 @@
Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
Inst.addOperand(MCOperand::CreateImm(getMemScale()));
Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
- Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
+ addExpr(Inst, getMemDisp());
}
static X86Operand *CreateToken(StringRef Str, SMLoc Loc) {
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s?rev=96055&r1=96054&r2=96055&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_64-new-encoder.s Fri Feb 12 18:17:21 2010
@@ -7,24 +7,20 @@
movb $12, foo(%rip)
// CHECK: movb $12, foo(%rip)
-// CHECK: encoding: [0xc6,0x05,A,A,A,A,B]
+// CHECK: encoding: [0xc6,0x05,A,A,A,A,0x0c]
// CHECK: fixup A - offset: 2, value: foo-1, kind: reloc_riprel_4byte
-// CHECK: fixup B - offset: 6, value: 12, kind: FK_Data_1
movw $12, foo(%rip)
// CHECK: movw $12, foo(%rip)
-// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,B,B]
+// CHECK: encoding: [0x66,0xc7,0x05,A,A,A,A,0x0c,0x00]
// CHECK: fixup A - offset: 3, value: foo-2, kind: reloc_riprel_4byte
-// CHECK: fixup B - offset: 7, value: 12, kind: FK_Data_2
movl $12, foo(%rip)
// CHECK: movl $12, foo(%rip)
-// CHECK: encoding: [0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK: encoding: [0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
// CHECK: fixup A - offset: 2, value: foo-4, kind: reloc_riprel_4byte
-// CHECK: fixup B - offset: 6, value: 12, kind: FK_Data_4
movq $12, foo(%rip)
// CHECK: movq $12, foo(%rip)
-// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,B,B,B,B]
+// CHECK: encoding: [0x48,0xc7,0x05,A,A,A,A,0x0c,0x00,0x00,0x00]
// CHECK: fixup A - offset: 3, value: foo-4, kind: reloc_riprel_4byte
-// CHECK: fixup B - offset: 7, value: 12, kind: FK_Data_4
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s?rev=96055&r1=96054&r2=96055&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_instructions.s Fri Feb 12 18:17:21 2010
@@ -109,31 +109,31 @@
repne;scasb
// CHECK: lock
-// CHECK: cmpxchgb %al, 0(%ebx)
+// CHECK: cmpxchgb %al, (%ebx)
lock;cmpxchgb %al, 0(%ebx)
// CHECK: cs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
cs;movb 0(%eax), %al
// CHECK: ss
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
ss;movb 0(%eax), %al
// CHECK: ds
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
ds;movb 0(%eax), %al
// CHECK: es
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
es;movb 0(%eax), %al
// CHECK: fs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
fs;movb 0(%eax), %al
// CHECK: gs
-// CHECK: movb 0(%eax), %al
+// CHECK: movb (%eax), %al
gs;movb 0(%eax), %al
// CHECK: fadd %st(0)
Modified: llvm/trunk/test/MC/AsmParser/X86/x86_operands.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/X86/x86_operands.s?rev=96055&r1=96054&r2=96055&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/X86/x86_operands.s (original)
+++ llvm/trunk/test/MC/AsmParser/X86/x86_operands.s Fri Feb 12 18:17:21 2010
@@ -24,7 +24,7 @@
addl $1, (4+4)(%eax)
# CHECK: addl $1, 8(%eax)
addl $1, 8(%eax)
-# CHECK: addl $1, 0(%eax)
+# CHECK: addl $1, (%eax)
addl $1, (%eax)
# CHECK: addl $1, 4+4(,%eax)
addl $1, (4+4)(,%eax)
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