[llvm-commits] [llvm] r95873 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Johnny Chen]

Author: johnny
Date: Thu Feb 11 11:14:31 2010
New Revision: 95873

URL: http://llvm.org/viewvc/llvm-project?rev=95873&view=rev
Log:
Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
as the "Permanently UNDEFINED" instruction.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=95873&r1=95872&r2=95873&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Feb 11 11:14:31 2010
@@ -619,6 +619,16 @@
   let Inst{7-4} = 0b1111;
 }
 
+// A5.4 Permanently UNDEFINED instructions.
+def TRAP : AI<(outs), (ins), Pseudo, NoItinerary, "trap", "",
+              [/* For disassembly only; pattern left blank */]>,
+           Requires<[IsARM]> {
+  let Inst{27-25} = 0b011;
+  let Inst{24-20} = 0b11111;
+  let Inst{7-5} = 0b111;
+  let Inst{4} = 0b1;
+}
+
 // Address computation and loads and stores in PIC mode.
 let isNotDuplicable = 1 in {
 def PICADD : AXI1<0b0100, (outs GPR:$dst), (ins GPR:$a, pclabel:$cp, pred:$p),