[llvm-commits] [llvm] r95749 - /llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

[Chris Lattner]

On Feb 9, 2010, at 5:31 PM, Dale Johannesen wrote:

> Author: johannes
> Date: Tue Feb  9 19:31:26 2010
> New Revision: 95749
>
> URL: http://llvm.org/viewvc/llvm-project?rev=95749&view=rev
> Log:
> Rewrite loop to suit Chris' preference.

The second !mi->isDebugValue() you added is now dead.

-Chris

>
>
> Modified:
>    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
>
> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=95749&r1=95748&r2=95749&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Feb  9  
> 19:31:26 2010
> @@ -611,23 +611,26 @@
>
>   MachineBasicBlock::iterator E = MBB->end();
>   while (mi != E) {
> -    if (!mi->isDebugValue()) {
> -      if (mi->killsRegister(interval.reg, tri_)) {
> -        DEBUG(dbgs() << " killed");
> -        end = baseIndex.getDefIndex();
> -        SeenDefUse = true;
> -        break;
> -      } else if (mi->modifiesRegister(interval.reg, tri_)) {
> -        // Another instruction redefines the register before it is  
> ever read.
> -        // Then the register is essentially dead at the instruction  
> that defines
> -        // it. Hence its interval is:
> -        // [defSlot(def), defSlot(def)+1)
> -        DEBUG(dbgs() << " dead");
> -        end = start.getStoreIndex();
> -        SeenDefUse = true;
> -        break;
> -      }
> +    if (mi->isDebugValue()) {
> +      ++mi;
> +      continue;
>     }
> +    if (mi->killsRegister(interval.reg, tri_)) {
> +      DEBUG(dbgs() << " killed");
> +      end = baseIndex.getDefIndex();
> +      SeenDefUse = true;
> +      break;
> +    } else if (mi->modifiesRegister(interval.reg, tri_)) {
> +      // Another instruction redefines the register before it is  
> ever read.
> +      // Then the register is essentially dead at the instruction  
> that defines
> +      // it. Hence its interval is:
> +      // [defSlot(def), defSlot(def)+1)
> +      DEBUG(dbgs() << " dead");
> +      end = start.getStoreIndex();
> +      SeenDefUse = true;
> +      break;
> +    }
> +
>     ++mi;
>     if (mi != E && !mi->isDebugValue()) {
>       baseIndex = indexes_->getNextNonNullIndex(baseIndex);
>
>
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