[llvm-commits] [llvm] r95739 - in /llvm/trunk/lib/CodeGen: LiveIntervalAnalysis.cpp SimpleRegisterCoalescing.cpp

[Chris Lattner]

On Feb 9, 2010, at 5:15 PM, Dale Johannesen wrote:

>
> On Feb 9, 2010, at 5:11 PMPST, Chris Lattner wrote:
>
>> On Feb 9, 2010, at 4:55 PM, Dale Johannesen wrote:
>>> URL: http://llvm.org/viewvc/llvm-project?rev=95739&view=rev
>>> Log:
>>> Skip DBG_VALUE many places in live intervals and
>>> register coalescing.  This fixes many crashes and
>>> places where debug info affects codegen (when
>>> dbg.value is lowered to machine instructions, which
>>> it isn't yet in TOT).
>>
>> Ok.
>>
>>> +  MachineBasicBlock::iterator E = MBB->end();
>>> +  while (mi != E) {
>>> +    if (!mi->isDebugValue()) {
>>
>> Can't this use continue like this:
>>
>> if (!mi->isDebugValue()) {
>> ++mi;
>> continue;
>> }
>
> It could.  I feel pretty strongly it's easier to read this way, but  
> it's not worth arguing about.

Please strive to reduce nesting, including in this case.

-Chris

>
>>> +      if (mi->killsRegister(interval.reg, tri_)) {
>>> +        DEBUG(dbgs() << " killed");
>>> +        end = baseIndex.getDefIndex();
>>> +        SeenDefUse = true;
>>> +        break;
>>> +      } else if (mi->modifiesRegister(interval.reg, tri_)) {
>>> +        // Another instruction redefines the register before it  
>>> is ever read.
>>> +        // Then the register is essentially dead at the  
>>> instruction that defines
>>> +        // it. Hence its interval is:
>>> +        // [defSlot(def), defSlot(def)+1)
>>> +        DEBUG(dbgs() << " dead");
>>> +        end = start.getStoreIndex();
>>> +        SeenDefUse = true;
>>> +        break;
>>> +      }
>>> +    }
>>>
>>
>