[llvm-commits] [dragonegg] r95458 - /dragonegg/trunk/llvm-convert.cpp

[Duncan Sands]

Author: baldrick
Date: Fri Feb  5 18:28:42 2010
New Revision: 95458

URL: http://llvm.org/viewvc/llvm-project?rev=95458&view=rev
Log:
The gimplifier special cases hard register variables when they are used
as an asm input: it doesn't assign the value an SSA name.  This would
crash dragonegg, which was expecting only the usual kinds of gimple
registers.  Fix this by loading the hard register using an asm, which
results in the same code as with llvm-gcc.  Testcases (from the GCC
test suite): asmreg-1.c, movq-2.c, pr31866.c, pr33619.c, pr39139.c

Modified:
    dragonegg/trunk/llvm-convert.cpp

Modified: dragonegg/trunk/llvm-convert.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/llvm-convert.cpp?rev=95458&r1=95457&r2=95458&view=diff

==============================================================================
--- dragonegg/trunk/llvm-convert.cpp (original)
+++ dragonegg/trunk/llvm-convert.cpp Fri Feb  5 18:28:42 2010
@@ -6589,7 +6589,7 @@
     if (NumChoices==0)
       NumChoices = NumInputChoices;
     else if (NumChoices != NumInputChoices)
-      abort();      // invalid constraints
+      llvm_unreachable("invalid constraints");
   }
   for (tree t = outputs; t; t = TREE_CHAIN(t)) {
     unsigned NumOutputChoices = 1;
@@ -6600,7 +6600,7 @@
     if (NumChoices==0)
       NumChoices = NumOutputChoices;
     else if (NumChoices != NumOutputChoices)
-      abort();      // invalid constraints
+      llvm_unreachable("invalid constraints");
   }
 
   /// Constraints - The output/input constraints, concatenated together in array
@@ -6767,8 +6767,15 @@
           // of an indirect branch.  Having this logic here is a hack; there
           // should be a bit in the label identifying it as in an asm.
           Op = getLabelDeclBlock(TREE_OPERAND(Val, 0));
-        } else
+        } else if (TREE_CODE(Val) == VAR_DECL && DECL_HARD_REGISTER(Val)) {
+          // GCC special cases hard registers used as inputs to asm statements.
+          // Emit an inline asm node that copies the value out of the specified
+          // register.
+          assert(canEmitRegisterVariable(Val) && "Cannot read hard register!");
+          Op = EmitReadOfRegisterVariable(Val);
+        } else {
           Op = EmitMemory(Val);
+        }
       } else {
         LValue LV = EmitLV(Val);
         assert(!LV.isBitfield() && "Inline asm can't have bitfield operand");
@@ -6859,7 +6866,7 @@
     if (isIndirect)
       ConstraintStr += '*';
 
-    // If this output register is pinned to a machine register, use that machine
+    // If this input register is pinned to a machine register, use that machine
     // register instead of the specified constraint.
     if (TREE_CODE(Val) == VAR_DECL && DECL_HARD_REGISTER(Val)) {
       const char *RegName = extractRegisterName(Val);