[llvm-commits] [llvm] r94914 - /llvm/trunk/lib/Target/Mips/MipsInstrFPU.td

[Bruno Cardoso Lopes]

Author: bruno
Date: Sat Jan 30 12:29:19 2010
New Revision: 94914

URL: http://llvm.org/viewvc/llvm-project?rev=94914&view=rev
Log:
Fix mov.d out register by using the FFR register class directly

Modified:
    llvm/trunk/lib/Target/Mips/MipsInstrFPU.td

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=94914&r1=94913&r2=94914&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Sat Jan 30 12:29:19 2010
@@ -113,7 +113,6 @@
   defm ROUND_W : FFR1_1<0b001100, "round.w">;
   defm TRUNC_W : FFR1_1<0b001101, "trunc.w">;
   defm CVTW    : FFR1_1<0b100100, "cvt.w">;
-  defm FMOV    : FFR1_1<0b000110, "mov">;
 
   defm FABS    : FFR1_2<0b000101, "abs",  fabs>; 
   defm FNEG    : FFR1_2<0b000111, "neg",  fneg>; 
@@ -173,6 +172,11 @@
                   "mtc1 $rt, $fs", []>;
 }
 
+def FMOV_S32 : FFR<0x11, 0b000110, 0x0, (outs FGR32:$fd), (ins FGR32:$fs),
+                   "mov.s $fd, $fs", []>;
+def FMOV_D32 : FFR<0x11, 0b000110, 0x1, (outs AFGR64:$fd), (ins AFGR64:$fs),
+                   "mov.d $fd, $fs", []>;
+
 /// Floating Point Memory Instructions
 let Predicates = [IsNotSingleFloat, IsNotMipsI] in {
   def LDC1 : FFI<0b110101, (outs AFGR64:$ft), (ins mem:$addr),