[llvm-commits] [llvm] r94745 - in /llvm/trunk: lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll

[Chris Lattner]

On Jan 28, 2010, at 9:22 AM, Duncan Sands wrote:

> Author: baldrick
> Date: Thu Jan 28 11:22:42 2010
> New Revision: 94745
>
> URL: http://llvm.org/viewvc/llvm-project?rev=94745&view=rev
> Log:
> Fix PR6165.  The bug was that LHSKnownZero was being and'd with  
> DemandedMask
> when it should have been and'd with LowBits.  Fix that and while  
> there beef
> up the logic in the case of a negative LHS.

Thanks Duncan,

Does DAG combine have similar code and a similar bug?

-Chris

>
> Added:
>    llvm/trunk/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll
> Modified:
>    llvm/trunk/lib/Transforms/InstCombine/ 
> InstCombineSimplifyDemanded.cpp
>
> Modified: llvm/trunk/lib/Transforms/InstCombine/ 
> InstCombineSimplifyDemanded.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=94745&r1=94744&r2=94745&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Transforms/InstCombine/ 
> InstCombineSimplifyDemanded.cpp (original)
> +++ llvm/trunk/lib/Transforms/InstCombine/ 
> InstCombineSimplifyDemanded.cpp Thu Jan 28 11:22:42 2010
> @@ -681,10 +681,19 @@
>                                  LHSKnownZero, LHSKnownOne, Depth+1))
>           return I;
>
> +        // The low bits of LHS are unchanged by the srem.
> +        KnownZero |= LHSKnownZero & LowBits;
> +        KnownOne |= LHSKnownOne & LowBits;
> +
> +        // If LHS is non-negative or has all low bits zero, then  
> the upper bits
> +        // are all zero.
>         if (LHSKnownZero[BitWidth-1] || ((LHSKnownZero & LowBits) ==  
> LowBits))
> -          LHSKnownZero |= ~LowBits;
> +          KnownZero |= ~LowBits;
>
> -        KnownZero |= LHSKnownZero & DemandedMask;
> +        // If LHS is negative and not all low bits are zero, then  
> the upper bits
> +        // are all one.
> +        if (LHSKnownOne[BitWidth-1] && ((LHSKnownOne & LowBits) !=  
> 0))
> +          KnownOne |= ~LowBits;
>
>         assert(!(KnownZero & KnownOne) && "Bits known to be one AND  
> zero?");
>       }
>
> Added: llvm/trunk/test/Transforms/InstCombine/2010-01-28- 
> NegativeSRem.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2010-01-28-NegativeSRem.ll?rev=94745&view=auto
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/Transforms/InstCombine/2010-01-28- 
> NegativeSRem.ll (added)
> +++ llvm/trunk/test/Transforms/InstCombine/2010-01-28- 
> NegativeSRem.ll Thu Jan 28 11:22:42 2010
> @@ -0,0 +1,19 @@
> +; RUN: opt < %s -instcombine -S | FileCheck %s
> +; PR6165
> +
> +define i32 @f() {
> +entry:
> +  br label %BB1
> +
> +BB1:                                              ; preds = %BB1,  
> %entry
> +; CHECK: BB1:
> +  %x = phi i32 [ -29, %entry ], [ 0, %BB1 ]       ; <i32> [#uses=2]
> +  %rem = srem i32 %x, 2                           ; <i32> [#uses=1]
> +  %t = icmp eq i32 %rem, -1                       ; <i1> [#uses=1]
> +  br i1 %t, label %BB2, label %BB1
> +; CHECK-NOT: br i1 false
> +
> +BB2:                                              ; preds = %BB1
> +; CHECK: BB2:
> +  ret i32 %x
> +}
>
>
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