[llvm-commits] [llvm] r94280 - in /llvm/trunk: lib/VMCore/Instructions.cpp test/Transforms/InstCombine/bitcast-sext-vector.ll
Mon P Wang
wangmp at apple.com
Fri Jan 22 20:35:57 PST 2010
Author: wangmp
Date: Fri Jan 22 22:35:57 2010
New Revision: 94280
URL: http://llvm.org/viewvc/llvm-project?rev=94280&view=rev
Log:
InstCombine should not fold sext/zext of a vector and a bitcast to a scalar to a sext/zext
Added:
llvm/trunk/test/Transforms/InstCombine/bitcast-sext-vector.ll
Modified:
llvm/trunk/lib/VMCore/Instructions.cpp
Modified: llvm/trunk/lib/VMCore/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/Instructions.cpp?rev=94280&r1=94279&r2=94280&view=diff
==============================================================================
--- llvm/trunk/lib/VMCore/Instructions.cpp (original)
+++ llvm/trunk/lib/VMCore/Instructions.cpp Fri Jan 22 22:35:57 2010
@@ -2079,8 +2079,9 @@
return secondOp;
case 3:
// no-op cast in second op implies firstOp as long as the DestTy
- // is integer
- if (DstTy->isInteger())
+ // is integer and we are not converting between a vector and a
+ // non vector type
+ if (SrcTy->getTypeID() != Type::VectorTyID && DstTy->isInteger())
return firstOp;
return 0;
case 4:
Added: llvm/trunk/test/Transforms/InstCombine/bitcast-sext-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/bitcast-sext-vector.ll?rev=94280&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/bitcast-sext-vector.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/bitcast-sext-vector.ll Fri Jan 22 22:35:57 2010
@@ -0,0 +1,11 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+; CHECK: sext
+; Don't fold zero/sign extensions with a bitcast between a vector and scalar.
+
+define i32 @t(<4 x i8> %src1, <4 x i8> %src2) nounwind readonly {
+entry:
+ %cmp = icmp eq <4 x i8> %src1, %src2; <<4 x i1>> [#uses=1]
+ %sext = sext <4 x i1> %cmp to <4 x i8>
+ %val = bitcast <4 x i8> %sext to i32
+ ret i32 %val
+}
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