[llvm-commits] PR6059 patch

[Rafael Espindola]

> It seems wrong to be putting these kinds of target-specific details in target-independent code.  It is fine to have the generic code insert padding, but that ought to be done based on some target hook that identifies when padding is needed.
>
> Your check for "ScalarElts.size() % 2" looks wrong.  There may be other arguments before the aggregate and some of them may be 64-bits and occupy 2 registers; or, with the hard-float variant of AAPCS, some of the preceding arguments may be passed in VFP registers.  Even if it was correct, it is too ARM-specific to put in the generic code.


> I really think this needs to be handled in llvm_arm_should_pass_aggregate_in_mixed_regs().

The way gcc does this is to keep a count of each used register kind.
Unfortunately in the GCC case the full function is ARM specific.  I
see that llvm,s x86 uses a count_num_registers_uses. This is a bit
less efficient but similar to what gcc does. I can try to do something
similar in ARM.

I wonder if defining a "resource counter" class would allow us to move
some of the code to a platform independent area...

> FAIL: gcc.dg/compat/scalar-by-value-3 c_compat_x_tst.o-c_compat_y_tst.o execute

Thanks. I wonder if I can get a basic linux APCS toolchain working....

Cheers,
-- 
Rafael Ávila de Espíndola