[llvm-commits] [llvm-gcc-4.2] r93705 - in /llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon: vst3f32.c vst3p16.c vst3p8.c vst3s16.c vst3s32.c vst3s64.c vst3s8.c vst3u16.c vst3u32.c vst3u64.c vst3u8.c
Bob Wilson
bob.wilson at apple.com
Sun Jan 17 17:56:57 PST 2010
Author: bwilson
Date: Sun Jan 17 19:56:56 2010
New Revision: 93705
URL: http://llvm.org/viewvc/llvm-project?rev=93705&view=rev
Log:
Fix errors in expected output for Neon VST3 tests. There are 3 source
registers, not 4 (excluding the address). This mistake doesn't show
up when testing gcc because it uses the "{dN-dM}" syntax, instead of
listing the individual registers.
Modified:
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3f32.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3f32.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3f32.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
}
-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p16.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p16.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p16.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
}
-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p8.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p8.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3p8.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
}
-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s16.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s16.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s16.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
}
-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s32.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s32.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s32.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
}
-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s64.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s64.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s64.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
}
-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s8.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s8.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3s8.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
}
-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u16.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u16.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u16.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
}
-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u32.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u32.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u32.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
}
-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u64.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u64.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u64.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
}
-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
Modified: llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u8.c?rev=93705&r1=93704&r2=93705&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u8.c (original)
+++ llvm-gcc-4.2/trunk/gcc/testsuite/gcc.target/arm/neon/vst3u8.c Sun Jan 17 19:56:56 2010
@@ -16,5 +16,6 @@
vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
}
-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+/* LLVM LOCAL fix expected number of registers in source operand list */
+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */
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