[llvm-commits] [llvm] r93436 - /llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

[Jakob Stoklund Olesen]

Author: stoklund
Date: Thu Jan 14 12:19:56 2010
New Revision: 93436

URL: http://llvm.org/viewvc/llvm-project?rev=93436&view=rev
Log:
ARM "l" constraint for inline asm means R0-R7, also for Thumb2.

This is consistent with llvm-gcc's arm/constraints.md.

Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.

Modified:
    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=93436&r1=93435&r2=93436&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Jan 14 12:19:56 2010
@@ -4258,10 +4258,10 @@
 ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
                                                 EVT VT) const {
   if (Constraint.size() == 1) {
-    // GCC RS6000 Constraint Letters
+    // GCC ARM Constraint Letters
     switch (Constraint[0]) {
     case 'l':
-      if (Subtarget->isThumb1Only())
+      if (Subtarget->isThumb())
         return std::make_pair(0U, ARM::tGPRRegisterClass);
       else
         return std::make_pair(0U, ARM::GPRRegisterClass);