[llvm-commits] [llvm] r93182 - /llvm/trunk/lib/Target/X86/X86InstrInfo.td

[Evan Cheng]

Author: evancheng
Date: Mon Jan 11 14:18:04 2010
New Revision: 93182

URL: http://llvm.org/viewvc/llvm-project?rev=93182&view=rev
Log:
Do not turn 8-bit OR to ADD since ADD8ri is not 3-addressfiable.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=93182&r1=93181&r2=93182&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon Jan 11 14:18:04 2010
@@ -1892,7 +1892,7 @@
 def OR8ri    : Ii8 <0x80, MRM1r, (outs GR8 :$dst), 
                     (ins GR8 :$src1, i8imm:$src2),
                     "or{b}\t{$src2, $dst|$dst, $src2}",
-                    [(set GR8:$dst, (or_not_add GR8:$src1, imm:$src2)),
+                    [(set GR8:$dst, (or GR8:$src1, imm:$src2)),
                      (implicit EFLAGS)]>;
 def OR16ri   : Ii16<0x81, MRM1r, (outs GR16:$dst), 
                     (ins GR16:$src1, i16imm:$src2),
@@ -4663,9 +4663,6 @@
           (SETB_C32r)>;
 
 // (or x, c) -> (add x, c) if masked bits are known zero.
-def : Pat<(parallel (or_is_add GR8:$src1, imm:$src2),
-                    (implicit EFLAGS)),
-          (ADD8ri GR8:$src1, imm:$src2)>;
 def : Pat<(parallel (or_is_add GR16:$src1, imm:$src2),
                     (implicit EFLAGS)),
           (ADD16ri GR16:$src1, imm:$src2)>;