[llvm-commits] [llvm] r92871 - /llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

[Jim Grosbach]

Author: grosbach
Date: Wed Jan  6 17:45:18 2010
New Revision: 92871

URL: http://llvm.org/viewvc/llvm-project?rev=92871&view=rev
Log:
Addressing mode 6 (load/store) instructions can't encode an immediate offset
for stack references.

Modified:
    llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp?rev=92871&r1=92870&r2=92871&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseRegisterInfo.cpp Wed Jan  6 17:45:18 2010
@@ -523,7 +523,7 @@
 
 /// estimateRSStackSizeLimit - Look at each instruction that references stack
 /// frames and return the stack size limit beyond which some of these
-/// instructions will require scratch register during their expansion later.
+/// instructions will require a scratch register during their expansion later.
 unsigned
 ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const {
   unsigned Limit = (1 << 12) - 1;
@@ -547,6 +547,9 @@
           // When the stack offset is negative, we will end up using
           // the i8 instructions instead.
           return (1 << 8) - 1;
+
+        if (AddrMode == ARMII::AddrMode6)
+          return 0;
         break; // At most one FI per instruction
       }
     }