[llvm-commits] [llvm] r92201 - in /llvm/trunk: lib/Target/PIC16/PIC16ISelLowering.cpp test/CodeGen/PIC16/C16-11.ll

Sanjiv Gupta sanjiv.gupta at microchip.com
Sun Dec 27 20:53:27 PST 2009


Author: sgupta
Date: Sun Dec 27 22:53:24 2009
New Revision: 92201

URL: http://llvm.org/viewvc/llvm-project?rev=92201&view=rev
Log:
Fixed llc crash for zext (i1 -> i8) loads.

Added:
    llvm/trunk/test/CodeGen/PIC16/C16-11.ll
Modified:
    llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp

Modified: llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp?rev=92201&r1=92200&r2=92201&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16ISelLowering.cpp Sun Dec 27 22:53:24 2009
@@ -930,7 +930,7 @@
   }
   else if (VT == MVT::i16) {
     BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, PICLoads[0], PICLoads[1]);
-    if (MemVT == MVT::i8)
+    if ((MemVT == MVT::i8) || (MemVT == MVT::i1))
       Chain = getChain(PICLoads[0]);
     else
       Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 
@@ -942,7 +942,7 @@
     BPs[1] = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i16,
                          PICLoads[2], PICLoads[3]);
     BP = DAG.getNode(ISD::BUILD_PAIR, dl, VT, BPs[0], BPs[1]);
-    if (MemVT == MVT::i8)
+    if ((MemVT == MVT::i8) || (MemVT == MVT::i1))
       Chain = getChain(PICLoads[0]);
     else if (MemVT == MVT::i16)
       Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 

Added: llvm/trunk/test/CodeGen/PIC16/C16-11.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PIC16/C16-11.ll?rev=92201&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/PIC16/C16-11.ll (added)
+++ llvm/trunk/test/CodeGen/PIC16/C16-11.ll Sun Dec 27 22:53:24 2009
@@ -0,0 +1,37 @@
+;RUN: llc < %s -march=pic16
+
+ at c612.auto.a.b = internal global i1 false         ; <i1*> [#uses=2]
+ at c612.auto.A.b = internal global i1 false         ; <i1*> [#uses=2]
+
+define void @c612() nounwind {
+entry:
+  %tmp3.b = load i1* @c612.auto.a.b               ; <i1> [#uses=1]
+  %tmp3 = zext i1 %tmp3.b to i16                  ; <i16> [#uses=1]
+  %tmp4.b = load i1* @c612.auto.A.b               ; <i1> [#uses=1]
+  %tmp4 = select i1 %tmp4.b, i16 2, i16 0         ; <i16> [#uses=1]
+  %cmp5 = icmp ne i16 %tmp3, %tmp4                ; <i1> [#uses=1]
+  %conv7 = zext i1 %cmp5 to i8                    ; <i8> [#uses=1]
+  tail call void @expectWrap(i8 %conv7, i8 2)
+  ret void
+}
+
+define void @expectWrap(i8 %boolresult, i8 %errCode) nounwind {
+entry:
+  %tobool = icmp eq i8 %boolresult, 0             ; <i1> [#uses=1]
+  br i1 %tobool, label %if.then, label %if.end
+
+if.then:                                          ; preds = %entry
+  tail call void @exit(i16 1)
+  unreachable
+
+if.end:                                           ; preds = %entry
+  ret void
+}
+
+define i16 @main() nounwind {
+entry:
+  tail call void @c612()
+  ret i16 0
+}
+
+declare void @exit(i16) noreturn nounwind





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