[llvm-commits] [llvm] r91850 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Bill Wendling isanbard at gmail.com
Mon Dec 21 15:10:20 PST 2009


Author: void
Date: Mon Dec 21 17:10:19 2009
New Revision: 91850

URL: http://llvm.org/viewvc/llvm-project?rev=91850&view=rev
Log:
More ordering plumbing. This time for GEP. I need to remember to assign
orderings to values returned by getValue().

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=91850&r1=91849&r2=91850&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Mon Dec 21 17:10:19 2009
@@ -2383,6 +2383,11 @@
   SDValue Src1 = getValue(I.getOperand(0));
   SDValue Src2 = getValue(I.getOperand(1));
 
+  if (DisableScheduling) {
+    DAG.AssignOrdering(Src1.getNode(), SDNodeOrder);
+    DAG.AssignOrdering(Src2.getNode(), SDNodeOrder);
+  }
+
   // Convert the ConstantVector mask operand into an array of ints, with -1
   // representing undef values.
   SmallVector<Constant*, 8> MaskElts;
@@ -2460,8 +2465,11 @@
                                        &MappedOps[0]);
     setValue(&I, Res);
 
-    if (DisableScheduling)
+    if (DisableScheduling) {
+      DAG.AssignOrdering(Src1.getNode(), SDNodeOrder);
+      DAG.AssignOrdering(Src2.getNode(), SDNodeOrder);
       DAG.AssignOrdering(Res.getNode(), SDNodeOrder);
+    }
 
     return;
   }
@@ -2671,11 +2679,13 @@
     DAG.AssignOrdering(Res.getNode(), SDNodeOrder);
 }
 
-
 void SelectionDAGBuilder::visitGetElementPtr(User &I) {
   SDValue N = getValue(I.getOperand(0));
   const Type *Ty = I.getOperand(0)->getType();
 
+  if (DisableScheduling)
+    DAG.AssignOrdering(N.getNode(), SDNodeOrder);
+
   for (GetElementPtrInst::op_iterator OI = I.op_begin()+1, E = I.op_end();
        OI != E; ++OI) {
     Value *Idx = *OI;
@@ -2686,7 +2696,11 @@
         uint64_t Offset = TD->getStructLayout(StTy)->getElementOffset(Field);
         N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
                         DAG.getIntPtrConstant(Offset));
+
+        if (DisableScheduling)
+          DAG.AssignOrdering(N.getNode(), SDNodeOrder);
       }
+
       Ty = StTy->getElementType(Field);
     } else {
       Ty = cast<SequentialType>(Ty)->getElementType();
@@ -2699,14 +2713,21 @@
         SDValue OffsVal;
         EVT PTy = TLI.getPointerTy();
         unsigned PtrBits = PTy.getSizeInBits();
-        if (PtrBits < 64) {
+        if (PtrBits < 64)
           OffsVal = DAG.getNode(ISD::TRUNCATE, getCurDebugLoc(),
                                 TLI.getPointerTy(),
                                 DAG.getConstant(Offs, MVT::i64));
-        } else
+        else
           OffsVal = DAG.getIntPtrConstant(Offs);
+
         N = DAG.getNode(ISD::ADD, getCurDebugLoc(), N.getValueType(), N,
                         OffsVal);
+
+        if (DisableScheduling) {
+          DAG.AssignOrdering(OffsVal.getNode(), SDNodeOrder);
+          DAG.AssignOrdering(N.getNode(), SDNodeOrder);
+        }
+
         continue;
       }
 
@@ -2732,12 +2753,19 @@
           IdxN = DAG.getNode(ISD::MUL, getCurDebugLoc(),
                              N.getValueType(), IdxN, Scale);
         }
+
+        if (DisableScheduling)
+          DAG.AssignOrdering(IdxN.getNode(), SDNodeOrder);
       }
 
       N = DAG.getNode(ISD::ADD, getCurDebugLoc(),
                       N.getValueType(), N, IdxN);
+
+      if (DisableScheduling)
+        DAG.AssignOrdering(N.getNode(), SDNodeOrder);
     }
   }
+
   setValue(&I, N);
 }
 





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