[llvm-commits] [llvm] r91727 - in /llvm/trunk: include/llvm/CodeGen/SDNodeOrdering.h include/llvm/CodeGen/SelectionDAG.h include/llvm/Target/TargetOptions.h lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h lib/Target/TargetMachine.cpp
Bill Wendling
isanbard at gmail.com
Fri Dec 18 15:32:54 PST 2009
Author: void
Date: Fri Dec 18 17:32:53 2009
New Revision: 91727
URL: http://llvm.org/viewvc/llvm-project?rev=91727&view=rev
Log:
Changes from review:
- Move DisableScheduling flag into TargetOption.h
- Move SDNodeOrdering into its own header file. Give it a minimal interface that
doesn't conflate construction with storage.
- Move assigning the ordering into the SelectionDAGBuilder.
This isn't used yet, so there should be no functional changes.
Added:
llvm/trunk/include/llvm/CodeGen/SDNodeOrdering.h
Modified:
llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
llvm/trunk/include/llvm/Target/TargetOptions.h
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
llvm/trunk/lib/Target/TargetMachine.cpp
Added: llvm/trunk/include/llvm/CodeGen/SDNodeOrdering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SDNodeOrdering.h?rev=91727&view=auto
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SDNodeOrdering.h (added)
+++ llvm/trunk/include/llvm/CodeGen/SDNodeOrdering.h Fri Dec 18 17:32:53 2009
@@ -0,0 +1,55 @@
+//===-- llvm/CodeGen/SDNodeOrdering.h - SDNode Ordering ---------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares the SDNodeOrdering class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_SDNODEORDERING_H
+#define LLVM_CODEGEN_SDNODEORDERING_H
+
+#include "llvm/ADT/DenseMap.h"
+
+namespace llvm {
+
+/// SDNodeOrdering - Maps a unique (monotonically increasing) value to each
+/// SDNode that roughly corresponds to the ordering of the original LLVM
+/// instruction. This is used for turning off scheduling, because we'll forgo
+/// the normal scheduling algorithms and output the instructions according to
+/// this ordering.
+class SDNodeOrdering {
+ DenseMap<const SDNode*, unsigned> OrderMap;
+
+ void operator=(const SDNodeOrdering&); // Do not implement.
+ SDNodeOrdering(const SDNodeOrdering&); // Do not implement.
+public:
+ SDNodeOrdering() {}
+
+ void add(const SDNode *Node, unsigned O) {
+ assert(O && "Invalid ordering!");
+ OrderMap[Node] = O;
+ }
+ void remove(const SDNode *Node) {
+ DenseMap<const SDNode*, unsigned>::iterator Itr = OrderMap.find(Node);
+ if (Itr != OrderMap.end())
+ OrderMap.erase(Itr);
+ }
+ void clear() {
+ OrderMap.clear();
+ }
+ unsigned getOrder(const SDNode *Node) {
+ unsigned Order = OrderMap[Node];
+ assert(Order && "Node isn't in ordering map!");
+ return Order;
+ }
+};
+
+} // end llvm namespace
+
+#endif
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAG.h?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Fri Dec 18 17:32:53 2009
@@ -29,12 +29,13 @@
namespace llvm {
class AliasAnalysis;
-class TargetLowering;
-class MachineModuleInfo;
class DwarfWriter;
-class MachineFunction;
-class MachineConstantPoolValue;
class FunctionLoweringInfo;
+class MachineConstantPoolValue;
+class MachineFunction;
+class MachineModuleInfo;
+class SDNodeOrdering;
+class TargetLowering;
template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> {
private:
@@ -110,45 +111,9 @@
/// SelectionDAG.
BumpPtrAllocator Allocator;
- /// NodeOrdering - Assigns a "line number" value to each SDNode that
- /// corresponds to the "line number" of the original LLVM instruction. This
- /// used for turning off scheduling, because we'll forgo the normal scheduling
- /// algorithm and output the instructions according to this ordering.
- class NodeOrdering {
- /// LineNo - The line of the instruction the node corresponds to. A value of
- /// `0' means it's not assigned.
- unsigned LineNo;
- std::map<const SDNode*, unsigned> Order;
-
- void operator=(const NodeOrdering&); // Do not implement.
- NodeOrdering(const NodeOrdering&); // Do not implement.
- public:
- NodeOrdering() : LineNo(0) {}
-
- void add(const SDNode *Node) {
- assert(LineNo && "Invalid line number!");
- Order[Node] = LineNo;
- }
- void remove(const SDNode *Node) {
- std::map<const SDNode*, unsigned>::iterator Itr = Order.find(Node);
- if (Itr != Order.end())
- Order.erase(Itr);
- }
- void clear() {
- Order.clear();
- LineNo = 1;
- }
- unsigned getLineNo(const SDNode *Node) {
- unsigned LN = Order[Node];
- assert(LN && "Node isn't in ordering map!");
- return LN;
- }
- void newInst() {
- ++LineNo;
- }
-
- void dump() const;
- } *Ordering;
+ /// SDNodeOrdering - The ordering of the SDNodes. It roughly corresponds to
+ /// the ordering of the original LLVM instructions.
+ SDNodeOrdering *Ordering;
/// VerifyNode - Sanity check the given node. Aborts if it is invalid.
void VerifyNode(SDNode *N);
@@ -242,13 +207,6 @@
return Root = N;
}
- /// NewInst - Tell the ordering object that we're processing a new
- /// instruction.
- void NewInst() {
- if (Ordering)
- Ordering->newInst();
- }
-
/// Combine - This iterates over the nodes in the SelectionDAG, folding
/// certain types of nodes together, or eliminating superfluous nodes. The
/// Level argument controls whether Combine is allowed to produce nodes and
@@ -873,6 +831,9 @@
}
}
+ /// AssignOrdering - Assign an order to the SDNode.
+ void AssignOrdering(SDNode *SD, unsigned Order);
+
void dump() const;
/// CreateStackTemporary - Create a stack temporary, suitable for holding the
Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
+++ llvm/trunk/include/llvm/Target/TargetOptions.h Fri Dec 18 17:32:53 2009
@@ -141,6 +141,11 @@
/// wth earlier copy coalescing.
extern bool StrongPHIElim;
+ /// DisableScheduling - This flag disables instruction scheduling. In
+ /// particular, it assigns an ordering to the SDNodes, which the scheduler
+ /// uses instead of its normal heuristics to perform scheduling.
+ extern bool DisableScheduling;
+
} // End llvm namespace
#endif
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp Fri Dec 18 17:32:53 2009
@@ -20,16 +20,10 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtarget.h"
-#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
-cl::opt<bool>
-DisableInstScheduling("disable-inst-scheduling",
- cl::init(false),
- cl::desc("Disable instruction scheduling"));
-
ScheduleDAGSDNodes::ScheduleDAGSDNodes(MachineFunction &mf)
: ScheduleDAG(mf) {
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Fri Dec 18 17:32:53 2009
@@ -25,6 +25,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/CodeGen/SDNodeOrdering.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
@@ -48,8 +49,6 @@
#include <cmath>
using namespace llvm;
-extern cl::opt<bool> DisableInstScheduling;
-
/// makeVTList - Return an instance of the SDVTList struct initialized with the
/// specified members.
static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
@@ -554,9 +553,6 @@
}
DeallocateNode(N);
-
- // Remove the ordering of this node.
- if (Ordering) Ordering->remove(N);
}
}
@@ -582,9 +578,6 @@
N->DropOperands();
DeallocateNode(N);
-
- // Remove the ordering of this node.
- if (Ordering) Ordering->remove(N);
}
void SelectionDAG::DeallocateNode(SDNode *N) {
@@ -703,7 +696,6 @@
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
AddNodeIDCustom(ID, N);
SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
- if (Ordering) Ordering->remove(Node);
return Node;
}
@@ -722,7 +714,6 @@
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
AddNodeIDCustom(ID, N);
SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
- if (Ordering) Ordering->remove(Node);
return Node;
}
@@ -741,7 +732,6 @@
AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
AddNodeIDCustom(ID, N);
SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
- if (Ordering) Ordering->remove(Node);
return Node;
}
@@ -798,10 +788,8 @@
getVTList(MVT::Other)),
Root(getEntryNode()), Ordering(0) {
AllNodes.push_back(&EntryNode);
- if (DisableInstScheduling) {
- Ordering = new NodeOrdering();
- Ordering->add(&EntryNode);
- }
+ if (DisableScheduling)
+ Ordering = new SDNodeOrdering();
}
void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi,
@@ -840,10 +828,8 @@
EntryNode.UseList = 0;
AllNodes.push_back(&EntryNode);
Root = getEntryNode();
- if (DisableInstScheduling) {
- Ordering = new NodeOrdering();
- Ordering->add(&EntryNode);
- }
+ if (DisableScheduling)
+ Ordering = new SDNodeOrdering();
}
SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
@@ -904,17 +890,15 @@
ID.AddPointer(&Val);
void *IP = 0;
SDNode *N = NULL;
- if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) {
- if (Ordering) Ordering->add(N);
+ if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
if (!VT.isVector())
return SDValue(N, 0);
- }
+
if (!N) {
N = NodeAllocator.Allocate<ConstantSDNode>();
new (N) ConstantSDNode(isT, &Val, EltVT);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
}
SDValue Result(N, 0);
@@ -951,17 +935,15 @@
ID.AddPointer(&V);
void *IP = 0;
SDNode *N = NULL;
- if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) {
- if (Ordering) Ordering->add(N);
+ if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
if (!VT.isVector())
return SDValue(N, 0);
- }
+
if (!N) {
N = NodeAllocator.Allocate<ConstantFPSDNode>();
new (N) ConstantFPSDNode(isTarget, &V, EltVT);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
}
SDValue Result(N, 0);
@@ -1016,15 +998,13 @@
ID.AddInteger(Offset);
ID.AddInteger(TargetFlags);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>();
new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1034,15 +1014,13 @@
AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
ID.AddInteger(FI);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>();
new (N) FrameIndexSDNode(FI, VT, isTarget);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1056,15 +1034,13 @@
ID.AddInteger(JTI);
ID.AddInteger(TargetFlags);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>();
new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1084,15 +1060,13 @@
ID.AddPointer(C);
ID.AddInteger(TargetFlags);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1113,15 +1087,13 @@
C->AddSelectionDAGCSEId(ID);
ID.AddInteger(TargetFlags);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>();
new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1130,15 +1102,13 @@
AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
ID.AddPointer(MBB);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>();
new (N) BasicBlockSDNode(MBB);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1154,7 +1124,6 @@
N = NodeAllocator.Allocate<VTSDNode>();
new (N) VTSDNode(VT);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1164,7 +1133,6 @@
N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
new (N) ExternalSymbolSDNode(false, Sym, 0, VT);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1177,7 +1145,6 @@
N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1190,8 +1157,8 @@
new (N) CondCodeSDNode(Cond);
CondCodeNodes[Cond] = N;
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
}
+
return SDValue(CondCodeNodes[Cond], 0);
}
@@ -1283,10 +1250,8 @@
ID.AddInteger(MaskVec[i]);
void* IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
// Allocate the mask array for the node out of the BumpPtrAllocator, since
// SDNode doesn't have access to it. This memory will be "leaked" when
@@ -1298,7 +1263,6 @@
new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1316,15 +1280,13 @@
SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
void* IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>();
new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1333,15 +1295,13 @@
AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
ID.AddInteger(RegNo);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<RegisterSDNode>();
new (N) RegisterSDNode(RegNo, VT);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1353,15 +1313,13 @@
AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
ID.AddInteger(LabelID);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<LabelSDNode>();
new (N) LabelSDNode(Opcode, dl, Root, LabelID);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1375,15 +1333,13 @@
ID.AddPointer(BA);
ID.AddInteger(TargetFlags);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>();
new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -1396,16 +1352,13 @@
ID.AddPointer(V);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>();
new (N) SrcValueSDNode(V);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -2316,16 +2269,14 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<SDNode>();
new (N) SDNode(Opcode, DL, getVTList(VT));
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -2549,10 +2500,9 @@
SDValue Ops[1] = { Operand };
AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
N = NodeAllocator.Allocate<UnarySDNode>();
new (N) UnarySDNode(Opcode, DL, VTs, Operand);
CSEMap.InsertNode(N, IP);
@@ -2562,7 +2512,6 @@
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -2970,10 +2919,9 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
N = NodeAllocator.Allocate<BinarySDNode>();
new (N) BinarySDNode(Opcode, DL, VTs, N1, N2);
CSEMap.InsertNode(N, IP);
@@ -2983,7 +2931,6 @@
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -3050,10 +2997,9 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
N = NodeAllocator.Allocate<TernarySDNode>();
new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
CSEMap.InsertNode(N, IP);
@@ -3063,7 +3009,6 @@
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -3659,14 +3604,12 @@
void* IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<AtomicSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -3724,14 +3667,12 @@
void* IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<AtomicSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
SDNode* N = NodeAllocator.Allocate<AtomicSDNode>();
new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -3804,7 +3745,6 @@
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
@@ -3816,7 +3756,6 @@
new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -3881,14 +3820,12 @@
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<LoadSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
SDNode *N = NodeAllocator.Allocate<LoadSDNode>();
new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -3959,14 +3896,12 @@
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<StoreSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -4021,14 +3956,12 @@
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
cast<StoreSDNode>(E)->refineAlignment(MMO);
- if (Ordering) Ordering->add(E);
return SDValue(E, 0);
}
SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO);
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -4045,17 +3978,15 @@
ID.AddInteger(ST->getMemoryVT().getRawBits());
ID.AddInteger(ST->getRawSubclassData());
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
SDNode *N = NodeAllocator.Allocate<StoreSDNode>();
new (N) StoreSDNode(Ops, dl, VTs, AM,
ST->isTruncatingStore(), ST->getMemoryVT(),
ST->getMemOperand());
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
return SDValue(N, 0);
}
@@ -4121,10 +4052,8 @@
AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
N = NodeAllocator.Allocate<SDNode>();
new (N) SDNode(Opcode, DL, VTs, Ops, NumOps);
@@ -4135,7 +4064,6 @@
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -4191,10 +4119,9 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return SDValue(E, 0);
- }
+
if (NumOps == 1) {
N = NodeAllocator.Allocate<UnarySDNode>();
new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]);
@@ -4225,7 +4152,6 @@
}
}
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -4688,10 +4614,8 @@
if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
- if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(ON);
+ if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
return ON;
- }
}
if (!RemoveNodeFromCSEMaps(N))
@@ -4755,7 +4679,6 @@
if (IP)
CSEMap.InsertNode(N, IP); // Memoize the new node.
- if (Ordering) Ordering->add(N);
return N;
}
@@ -4894,10 +4817,8 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return cast<MachineSDNode>(E);
- }
}
// Allocate a new MachineSDNode.
@@ -4919,7 +4840,6 @@
CSEMap.InsertNode(N, IP);
AllNodes.push_back(N);
- if (Ordering) Ordering->add(N);
#ifndef NDEBUG
VerifyNode(N);
#endif
@@ -4956,10 +4876,8 @@
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
- if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
- if (Ordering) Ordering->add(E);
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
return E;
- }
}
return NULL;
}
@@ -5291,6 +5209,12 @@
return DAGSize;
}
+/// AssignOrdering - Assign an order to the SDNode.
+void SelectionDAG::AssignOrdering(SDNode *SD, unsigned Order) {
+ assert(SD && "Trying to assign an order to a null node!");
+ if (Ordering)
+ Ordering->add(SD, Order);
+}
//===----------------------------------------------------------------------===//
@@ -6126,9 +6050,6 @@
errs() << "\n\n";
}
-void SelectionDAG::NodeOrdering::dump() const {
-}
-
void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
print_types(OS, G);
print_details(OS, G);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Fri Dec 18 17:32:53 2009
@@ -583,8 +583,10 @@
}
void SelectionDAGBuilder::visit(unsigned Opcode, User &I) {
- // Tell the DAG that we're processing a new instruction.
- DAG.NewInst();
+ // We're processing a new instruction.
+ ++SDNodeOrder;
+
+ SDNode *PrevNode = DAG.getRoot().getNode();
// Note: this doesn't use InstVisitor, because it has to work with
// ConstantExpr's in addition to instructions.
@@ -592,9 +594,12 @@
default: llvm_unreachable("Unknown instruction type encountered!");
// Build the switch statement using the Instruction.def file.
#define HANDLE_INST(NUM, OPCODE, CLASS) \
- case Instruction::OPCODE:return visit##OPCODE((CLASS&)I);
+ case Instruction::OPCODE: visit##OPCODE((CLASS&)I); break;
#include "llvm/Instruction.def"
}
+
+ if (DisableScheduling && DAG.getRoot().getNode() != PrevNode)
+ DAG.AssignOrdering(DAG.getRoot().getNode(), SDNodeOrder);
}
SDValue SelectionDAGBuilder::getValue(const Value *V) {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h Fri Dec 18 17:32:53 2009
@@ -104,6 +104,10 @@
/// instructions.
SmallVector<SDValue, 8> PendingExports;
+ /// SDNodeOrder - A unique monotonically increasing number used to order the
+ /// SDNodes we create.
+ unsigned SDNodeOrder;
+
/// Case - A struct to record the Value for a switch case, and the
/// case's target basic block.
struct Case {
@@ -300,7 +304,7 @@
SelectionDAGBuilder(SelectionDAG &dag, TargetLowering &tli,
FunctionLoweringInfo &funcinfo,
CodeGenOpt::Level ol)
- : CurDebugLoc(DebugLoc::getUnknownLoc()),
+ : CurDebugLoc(DebugLoc::getUnknownLoc()), SDNodeOrder(0),
TLI(tli), DAG(dag), FuncInfo(funcinfo), OptLevel(ol),
HasTailCall(false),
Context(dag.getContext()) {
Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=91727&r1=91726&r2=91727&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Fri Dec 18 17:32:53 2009
@@ -46,6 +46,7 @@
bool DisableJumpTables;
bool StrongPHIElim;
bool AsmVerbosityDefault(false);
+ bool DisableScheduling;
}
static cl::opt<bool, true>
@@ -197,6 +198,11 @@
cl::desc("Use strong PHI elimination."),
cl::location(StrongPHIElim),
cl::init(false));
+static cl::opt<bool, true>
+DisableInstScheduling("disable-scheduling",
+ cl::desc("Disable instruction scheduling"),
+ cl::location(DisableScheduling),
+ cl::init(false));
//---------------------------------------------------------------------------
// TargetMachine Class
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