[llvm-commits] [llvm] r91313 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td ARMInstrThumb2.td

[Jim Grosbach]

Author: grosbach
Date: Mon Dec 14 13:24:11 2009
New Revision: 91313

URL: http://llvm.org/viewvc/llvm-project?rev=91313&view=rev
Log:
correct selection requirements for thumb2 vs. arm versions of the barrier intrinsics

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=91313&r1=91312&r2=91313&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Dec 14 13:24:11 2009
@@ -1579,7 +1579,7 @@
                         Pseudo, NoItinerary,
                         "dmb", "",
                         [(ARMMemBarrier)]>,
-                        Requires<[HasV7]> {
+                        Requires<[IsARM, HasV7]> {
   let Inst{31-4} = 0xf57ff05;
   // FIXME: add support for options other than a full system DMB
   let Inst{3-0} = 0b1111;
@@ -1589,7 +1589,7 @@
                         Pseudo, NoItinerary,
                         "dsb", "",
                         [(ARMSyncBarrier)]>,
-                        Requires<[HasV7]> {
+                        Requires<[IsARM, HasV7]> {
   let Inst{31-4} = 0xf57ff04;
   // FIXME: add support for options other than a full system DSB
   let Inst{3-0} = 0b1111;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=91313&r1=91312&r2=91313&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Mon Dec 14 13:24:11 2009
@@ -1073,14 +1073,16 @@
 def t2Int_MemBarrierV7 : AInoP<(outs), (ins),
                         Pseudo, NoItinerary,
                         "dmb", "",
-                        [(ARMMemBarrier)]> {
+                        [(ARMMemBarrier)]>,
+                        Requires<[IsThumb2]> {
   // FIXME: add support for options other than a full system DMB
 }
 
 def t2Int_SyncBarrierV7 : AInoP<(outs), (ins),
                         Pseudo, NoItinerary,
                         "dsb", "",
-                        [(ARMSyncBarrier)]> {
+                        [(ARMSyncBarrier)]>,
+                        Requires<[IsThumb2]> {
   // FIXME: add support for options other than a full system DSB
 }
 }