[llvm-commits] [llvm] r90144 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/CodeGen/TailDuplication.cpp lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMBaseInstrInfo.h lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/PowerPC/PPCInstrInfo.h lib/Target/X86/X86InstrInfo.h
Bob Wilson
bob.wilson at apple.com
Mon Nov 30 10:35:03 PST 2009
Author: bwilson
Date: Mon Nov 30 12:35:03 2009
New Revision: 90144
URL: http://llvm.org/viewvc/llvm-project?rev=90144&view=rev
Log:
Remove isProfitableToDuplicateIndirectBranch target hook. It is profitable
for all the processors where I have tried it, and even when it might not help
performance, the cost is quite low. The opportunities for duplicating
indirect branches are limited by other factors so code size does not change
much due to tail duplicating indirect branches aggressively.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/CodeGen/TailDuplication.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
llvm/trunk/lib/Target/X86/X86InstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Nov 30 12:35:03 2009
@@ -543,10 +543,6 @@
/// length.
virtual unsigned getInlineAsmLength(const char *Str,
const MCAsmInfo &MAI) const;
-
- /// isProfitableToDuplicateIndirectBranch - Returns true if tail duplication
- /// is especially profitable for indirect branches.
- virtual bool isProfitableToDuplicateIndirectBranch() const { return false; }
};
/// TargetInstrInfoImpl - This is the default implementation of
Modified: llvm/trunk/lib/CodeGen/TailDuplication.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TailDuplication.cpp?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TailDuplication.cpp (original)
+++ llvm/trunk/lib/CodeGen/TailDuplication.cpp Mon Nov 30 12:35:03 2009
@@ -118,8 +118,7 @@
unsigned MaxDuplicateCount;
if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
MaxDuplicateCount = 1;
- else if (TII->isProfitableToDuplicateIndirectBranch() &&
- !TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
+ else if (!TailBB->empty() && TailBB->back().getDesc().isIndirectBranch())
// If the target has hardware branch prediction that can handle indirect
// branches, duplicating them can often make them predictable when there
// are common paths through the code. The limit needs to be high enough
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Nov 30 12:35:03 2009
@@ -1027,12 +1027,6 @@
return TargetInstrInfoImpl::isIdentical(MI0, MI1, MRI);
}
-bool ARMBaseInstrInfo::isProfitableToDuplicateIndirectBranch() const {
- // If the target processor can predict indirect branches, it is highly
- // desirable to duplicate them, since it can often make them predictable.
- return getSubtarget().hasBranchTargetBuffer();
-}
-
/// getInstrPredicate - If instruction is predicated, returns its predicate
/// condition, otherwise returns AL. It also returns the condition code
/// register by reference.
Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Mon Nov 30 12:35:03 2009
@@ -290,8 +290,6 @@
virtual bool isIdentical(const MachineInstr *MI, const MachineInstr *Other,
const MachineRegisterInfo *MRI) const;
-
- virtual bool isProfitableToDuplicateIndirectBranch() const;
};
static inline
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Mon Nov 30 12:35:03 2009
@@ -114,8 +114,6 @@
if (UseNEONFP.getPosition() == 0)
UseNEONForSinglePrecisionFP = true;
}
- HasBranchTargetBuffer = (CPUString == "cortex-a8" ||
- CPUString == "cortex-a9");
}
/// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Mon Nov 30 12:35:03 2009
@@ -50,9 +50,6 @@
/// determine if NEON should actually be used.
bool UseNEONForSinglePrecisionFP;
- /// HasBranchTargetBuffer - True if processor can predict indirect branches.
- bool HasBranchTargetBuffer;
-
/// IsThumb - True if we are in thumb mode, false if in ARM mode.
bool IsThumb;
@@ -130,8 +127,6 @@
bool isThumb2() const { return IsThumb && (ThumbMode == Thumb2); }
bool hasThumb2() const { return ThumbMode >= Thumb2; }
- bool hasBranchTargetBuffer() const { return HasBranchTargetBuffer; }
-
bool isR9Reserved() const { return IsR9Reserved; }
bool useMovt() const { return UseMovt && hasV6T2Ops(); }
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.h Mon Nov 30 12:35:03 2009
@@ -151,8 +151,6 @@
/// instruction may be. This returns the maximum number of bytes.
///
virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
-
- virtual bool isProfitableToDuplicateIndirectBranch() const { return true; }
};
}
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=90144&r1=90143&r2=90144&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Nov 30 12:35:03 2009
@@ -632,8 +632,6 @@
///
unsigned getGlobalBaseReg(MachineFunction *MF) const;
- virtual bool isProfitableToDuplicateIndirectBranch() const { return true; }
-
private:
MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
MachineInstr* MI,
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