[llvm-commits] [llvm] r89811 - in /llvm/trunk: lib/Target/PowerPC/PPCFrameInfo.h lib/Target/PowerPC/PPCRegisterInfo.cpp test/CodeGen/PowerPC/Frames-alloca.ll test/CodeGen/PowerPC/Frames-large.ll test/CodeGen/PowerPC/Frames-small.ll test/CodeGen/PowerPC/ppc-prologue.ll

Evan Cheng evan.cheng at apple.com
Tue Nov 24 16:49:29 PST 2009


I see compilation warnings:

In file included from PPCRegisterInfo.cpp:20:
PPCFrameInfo.h: In member function 'virtual const llvm::TargetFrameInfo::SpillSlot* llvm::PPCFrameInfo::getCalleeSavedSpillSlots(unsigned int&) const':
PPCFrameInfo.h:97: warning: missing braces around initializer for 'const llvm::TargetFrameInfo::SpillSlot'
PPCFrameInfo.h:100: warning: missing braces around initializer for 'const llvm::TargetFrameInfo::SpillSlot'

Evan
On Nov 24, 2009, at 2:59 PM, Dale Johannesen wrote:

> Author: johannes
> Date: Tue Nov 24 16:59:02 2009
> New Revision: 89811
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=89811&view=rev
> Log:
> Do not store R31 into the caller's link area on PPC.
> This violates the ABI (that area is "reserved"), and
> while it is safe if all code is generated with current
> compilers, there is some very old code around that uses
> that slot for something else, and breaks if it is stored
> into.  Adjust testcases looking for current behavior.
> I've verified that the stack frame size is right in all
> testcases, whether it changed or not.  7311323.
> 
> 
> Modified:
>    llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h
>    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
>    llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll
>    llvm/trunk/test/CodeGen/PowerPC/Frames-large.ll
>    llvm/trunk/test/CodeGen/PowerPC/Frames-small.ll
>    llvm/trunk/test/CodeGen/PowerPC/ppc-prologue.ll
> 
> Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCFrameInfo.h Tue Nov 24 16:59:02 2009
> @@ -42,11 +42,12 @@
>   /// frame pointer.
>   static unsigned getFramePointerSaveOffset(bool isPPC64, bool isDarwinABI) {
>     // For the Darwin ABI:
> -    // Use the TOC save slot in the PowerPC linkage area for saving the frame
> -    // pointer (if needed.)  LLVM does not generate code that uses the TOC (R2
> -    // is treated as a caller saved register.)
> +    // We cannot use the TOC save slot (offset +20) in the PowerPC linkage area
> +    // for saving the frame pointer (if needed.)  While the published ABI has
> +    // not used this slot since at least MacOSX 10.2, there is older code
> +    // around that does use it, and that needs to continue to work.
>     if (isDarwinABI)
> -      return isPPC64 ? 40 : 20;
> +      return isPPC64 ? -8U : -4U;
> 
>     // SVR4 ABI: First slot in the general register save area.
>     return -4U;
> @@ -90,6 +91,17 @@
>   // With the SVR4 ABI, callee-saved registers have fixed offsets on the stack.
>   const SpillSlot *
>   getCalleeSavedSpillSlots(unsigned &NumEntries) const {
> +    if (TM.getSubtarget<PPCSubtarget>().isDarwinABI()) {
> +      NumEntries = 1;
> +      if (TM.getSubtarget<PPCSubtarget>().isPPC64()) {
> +        static const SpillSlot darwin64Offsets[] = {PPC::X31, -8};
> +        return darwin64Offsets;
> +      } else {
> +        static const SpillSlot darwinOffsets[] = {PPC::R31, -4};
> +        return darwinOffsets;
> +      }
> +    }
> +
>     // Early exit if not using the SVR4 ABI.
>     if (!TM.getSubtarget<PPCSubtarget>().isSVR4ABI()) {
>       NumEntries = 0;
> 
> Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Nov 24 16:59:02 2009
> @@ -1033,12 +1033,11 @@
>   //  Save R31 if necessary
>   int FPSI = FI->getFramePointerSaveIndex();
>   bool isPPC64 = Subtarget.isPPC64();
> -  bool isSVR4ABI = Subtarget.isSVR4ABI();
>   bool isDarwinABI  = Subtarget.isDarwinABI();
>   MachineFrameInfo *MFI = MF.getFrameInfo();
> 
>   // If the frame pointer save index hasn't been defined yet.
> -  if (!FPSI && needsFP(MF) && isSVR4ABI) {
> +  if (!FPSI && needsFP(MF)) {
>     // Find out what the fix offset of the frame pointer save area.
>     int FPOffset = PPCFrameInfo::getFramePointerSaveOffset(isPPC64,
>                                                            isDarwinABI);
> 
> Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/Frames-alloca.ll Tue Nov 24 16:59:02 2009
> @@ -6,23 +6,23 @@
> ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -enable-ppc32-regscavenger | FileCheck %s -check-prefix=PPC32-RS
> ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim -enable-ppc32-regscavenger | FileCheck %s -check-prefix=PPC32-RS-NOFP
> 
> -; CHECK-PPC32: stw r31, 20(r1)
> +; CHECK-PPC32: stw r31, -4(r1)
> ; CHECK-PPC32: lwz r1, 0(r1)
> -; CHECK-PPC32: lwz r31, 20(r1)
> -; CHECK-PPC32-NOFP: stw r31, 20(r1)
> +; CHECK-PPC32: lwz r31, -4(r1)
> +; CHECK-PPC32-NOFP: stw r31, -4(r1)
> ; CHECK-PPC32-NOFP: lwz r1, 0(r1)
> -; CHECK-PPC32-NOFP: lwz r31, 20(r1)
> +; CHECK-PPC32-NOFP: lwz r31, -4(r1)
> ; CHECK-PPC32-RS: stwu r1, -80(r1)
> ; CHECK-PPC32-RS-NOFP: stwu r1, -80(r1)
> 
> -; CHECK-PPC64: std r31, 40(r1)
> -; CHECK-PPC64: stdu r1, -112(r1)
> +; CHECK-PPC64: std r31, -8(r1)
> +; CHECK-PPC64: stdu r1, -128(r1)
> ; CHECK-PPC64: ld r1, 0(r1)
> -; CHECK-PPC64: ld r31, 40(r1)
> -; CHECK-PPC64-NOFP: std r31, 40(r1)
> -; CHECK-PPC64-NOFP: stdu r1, -112(r1)
> +; CHECK-PPC64: ld r31, -8(r1)
> +; CHECK-PPC64-NOFP: std r31, -8(r1)
> +; CHECK-PPC64-NOFP: stdu r1, -128(r1)
> ; CHECK-PPC64-NOFP: ld r1, 0(r1)
> -; CHECK-PPC64-NOFP: ld r31, 40(r1)
> +; CHECK-PPC64-NOFP: ld r31, -8(r1)
> 
> define i32* @f1(i32 %n) {
> 	%tmp = alloca i32, i32 %n		; <i32*> [#uses=1]
> 
> Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-large.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-large.ll?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/Frames-large.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/Frames-large.ll Tue Nov 24 16:59:02 2009
> @@ -22,13 +22,13 @@
> ; PPC32-NOFP: 	blr 
> 
> ; PPC32-FP: _f1:
> -; PPC32-FP:	stw r31, 20(r1)
> +; PPC32-FP:	stw r31, -4(r1)
> ; PPC32-FP:	lis r0, -1
> ; PPC32-FP:	ori r0, r0, 32704
> ; PPC32-FP:	stwux r1, r1, r0
> ; ...
> ; PPC32-FP:	lwz r1, 0(r1)
> -; PPC32-FP:	lwz r31, 20(r1)
> +; PPC32-FP:	lwz r31, -4(r1)
> ; PPC32-FP:	blr 
> 
> 
> @@ -42,11 +42,11 @@
> 
> 
> ; PPC64-FP: _f1:
> -; PPC64-FP:	std r31, 40(r1)
> +; PPC64-FP:	std r31, -8(r1)
> ; PPC64-FP:	lis r0, -1
> -; PPC64-FP:	ori r0, r0, 32656
> +; PPC64-FP:	ori r0, r0, 32640
> ; PPC64-FP:	stdux r1, r1, r0
> ; ...
> ; PPC64-FP:	ld r1, 0(r1)
> -; PPC64-FP:	ld r31, 40(r1)
> +; PPC64-FP:	ld r31, -8(r1)
> ; PPC64-FP:	blr 
> 
> Modified: llvm/trunk/test/CodeGen/PowerPC/Frames-small.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/Frames-small.ll?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/Frames-small.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/Frames-small.ll Tue Nov 24 16:59:02 2009
> @@ -1,26 +1,26 @@
> ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1
> -; RUN  not grep {stw r31, 20(r1)} %t1
> +; RUN  not grep {stw r31, -4(r1)} %t1
> ; RUN: grep {stwu r1, -16448(r1)} %t1
> ; RUN: grep {addi r1, r1, 16448} %t1
> ; RUN: llc < %s -march=ppc32 | \
> -; RUN: not grep {lwz r31, 20(r1)}
> +; RUN: not grep {lwz r31, -4(r1)}
> ; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
> ; RUN:   -o %t2
> -; RUN: grep {stw r31, 20(r1)} %t2
> +; RUN: grep {stw r31, -4(r1)} %t2
> ; RUN: grep {stwu r1, -16448(r1)} %t2
> ; RUN: grep {addi r1, r1, 16448} %t2
> -; RUN: grep {lwz r31, 20(r1)} %t2
> +; RUN: grep {lwz r31, -4(r1)} %t2
> ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3
> -; RUN: not grep {std r31, 40(r1)} %t3
> +; RUN: not grep {std r31, -8(r1)} %t3
> ; RUN: grep {stdu r1, -16496(r1)} %t3
> ; RUN: grep {addi r1, r1, 16496} %t3
> -; RUN: not grep {ld r31, 40(r1)} %t3
> +; RUN: not grep {ld r31, -8(r1)} %t3
> ; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \
> ; RUN:   -o %t4
> -; RUN: grep {std r31, 40(r1)} %t4
> -; RUN: grep {stdu r1, -16496(r1)} %t4
> -; RUN: grep {addi r1, r1, 16496} %t4
> -; RUN: grep {ld r31, 40(r1)} %t4
> +; RUN: grep {std r31, -8(r1)} %t4
> +; RUN: grep {stdu r1, -16512(r1)} %t4
> +; RUN: grep {addi r1, r1, 16512} %t4
> +; RUN: grep {ld r31, -8(r1)} %t4
> 
> define i32* @f1() {
>         %tmp = alloca i32, i32 4095             ; <i32*> [#uses=1]
> 
> Modified: llvm/trunk/test/CodeGen/PowerPC/ppc-prologue.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc-prologue.ll?rev=89811&r1=89810&r2=89811&view=diff
> 
> ==============================================================================
> --- llvm/trunk/test/CodeGen/PowerPC/ppc-prologue.ll (original)
> +++ llvm/trunk/test/CodeGen/PowerPC/ppc-prologue.ll Tue Nov 24 16:59:02 2009
> @@ -2,7 +2,7 @@
> 
> define i32 @_Z4funci(i32 %a) ssp {
> ; CHECK:       mflr r0
> -; CHECK-NEXT:  stw r31, 20(r1)
> +; CHECK-NEXT:  stw r31, -4(r1)
> ; CHECK-NEXT:  stw r0, 8(r1)
> ; CHECK-NEXT:  stwu r1, -80(r1)
> ; CHECK-NEXT: Llabel1:
> 
> 
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