[llvm-commits] [llvm] r89360 - /llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td
Dan Gohman
gohman at apple.com
Thu Nov 19 08:35:11 PST 2009
Author: djg
Date: Thu Nov 19 10:35:11 2009
New Revision: 89360
URL: http://llvm.org/viewvc/llvm-project?rev=89360&view=rev
Log:
Fix a typo in a comment.
Modified:
llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td?rev=89360&r1=89359&r2=89360&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinRegisterInfo.td Thu Nov 19 10:35:11 2009
@@ -44,7 +44,7 @@
let Num = num;
}
-// Ywo halves of 32-bit register
+// Two halves of 32-bit register
multiclass Rss<bits<3> group, bits<3> num, string n> {
def H : Rs<group, num, 1, !strconcat(n, ".h")>;
def L : Rs<group, num, 0, !strconcat(n, ".l")>;
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