[llvm-commits] [llvm] r89328 - in /llvm/trunk: lib/Target/ARM/ARMInstrThumb.td lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp lib/Target/ARM/AsmPrinter/ARMInstPrinter.h test/CodeGen/Thumb/pop.ll test/CodeGen/Thumb2/2009-07-21-ISelBug.ll test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll test/CodeGen/Thumb2/large-stack.ll
Evan Cheng
evan.cheng at apple.com
Wed Nov 18 22:57:41 PST 2009
Author: evancheng
Date: Thu Nov 19 00:57:41 2009
New Revision: 89328
URL: http://llvm.org/viewvc/llvm-project?rev=89328&view=rev
Log:
More consistent thumb1 asm printing.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
llvm/trunk/test/CodeGen/Thumb/pop.ll
llvm/trunk/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
llvm/trunk/test/CodeGen/Thumb2/large-stack.ll
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb.td?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb.td Thu Nov 19 00:57:41 2009
@@ -66,6 +66,11 @@
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
+// Scaled 4 immediate.
+def t_imm_s4 : Operand<i32> {
+ let PrintMethod = "printThumbS4ImmOperand";
+}
+
// Define Thumb specific addressing modes.
// t_addrmode_rr := reg + reg
@@ -134,20 +139,20 @@
[(set GPR:$dst, (ARMpic_add GPR:$lhs, imm:$cp))]>;
// PC relative add.
-def tADDrPCi : T1I<(outs tGPR:$dst), (ins i32imm:$rhs), IIC_iALUi,
- "add\t$dst, pc, $rhs * 4", []>;
+def tADDrPCi : T1I<(outs tGPR:$dst), (ins t_imm_s4:$rhs), IIC_iALUi,
+ "add\t$dst, pc, $rhs", []>;
// ADD rd, sp, #imm8
-def tADDrSPi : T1I<(outs tGPR:$dst), (ins GPR:$sp, i32imm:$rhs), IIC_iALUi,
- "add\t$dst, $sp, $rhs * 4", []>;
+def tADDrSPi : T1I<(outs tGPR:$dst), (ins GPR:$sp, t_imm_s4:$rhs), IIC_iALUi,
+ "add\t$dst, $sp, $rhs", []>;
// ADD sp, sp, #imm7
-def tADDspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), IIC_iALUi,
- "add\t$dst, $rhs * 4", []>;
+def tADDspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, t_imm_s4:$rhs), IIC_iALUi,
+ "add\t$dst, $rhs", []>;
// SUB sp, sp, #imm7
-def tSUBspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs), IIC_iALUi,
- "sub\t$dst, $rhs * 4", []>;
+def tSUBspi : TIt<(outs GPR:$dst), (ins GPR:$lhs, t_imm_s4:$rhs), IIC_iALUi,
+ "sub\t$dst, $rhs", []>;
// ADD rm, sp
def tADDrSP : TIt<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr,
@@ -159,8 +164,8 @@
// Pseudo instruction that will expand into a tSUBspi + a copy.
let usesCustomInserter = 1 in { // Expanded after instruction selection.
-def tSUBspi_ : PseudoInst<(outs GPR:$dst), (ins GPR:$lhs, i32imm:$rhs),
- NoItinerary, "@ sub\t$dst, $rhs * 4", []>;
+def tSUBspi_ : PseudoInst<(outs GPR:$dst), (ins GPR:$lhs, t_imm_s4:$rhs),
+ NoItinerary, "@ sub\t$dst, $rhs", []>;
def tADDspr_ : PseudoInst<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs),
NoItinerary, "@ add\t$dst, $rhs", []>;
Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp Thu Nov 19 00:57:41 2009
@@ -110,6 +110,7 @@
const char *Modifier = 0);
void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
+ void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum);
void printThumbITMask(const MachineInstr *MI, int OpNum);
void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
@@ -674,6 +675,10 @@
//===--------------------------------------------------------------------===//
+void ARMAsmPrinter::printThumbS4ImmOperand(const MachineInstr *MI, int Op) {
+ O << "#" << MI->getOperand(Op).getImm() * 4;
+}
+
void
ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
// (3 - the number of trailing zeros) is the number of then / else.
Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp Thu Nov 19 00:57:41 2009
@@ -351,3 +351,8 @@
// FIXME: remove this.
abort();
}
+
+void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum) {
+ // FIXME: remove this.
+ abort();
+}
Modified: llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h (original)
+++ llvm/trunk/lib/Target/ARM/AsmPrinter/ARMInstPrinter.h Thu Nov 19 00:57:41 2009
@@ -52,7 +52,8 @@
const char *Modifier = 0);
void printBitfieldInvMaskImmOperand(const MCInst *MI, unsigned OpNum);
-
+
+ void printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum);
void printThumbITMask(const MCInst *MI, unsigned OpNum) {}
void printThumbAddrModeRROperand(const MCInst *MI, unsigned OpNum) {}
void printThumbAddrModeRI5Operand(const MCInst *MI, unsigned OpNum,
Modified: llvm/trunk/test/CodeGen/Thumb/pop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/pop.ll?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/pop.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb/pop.ll Thu Nov 19 00:57:41 2009
@@ -4,7 +4,7 @@
define arm_apcscc void @t(i8* %a, ...) nounwind {
; CHECK: t:
; CHECK: pop {r3}
-; CHECK-NEXT: add sp, #3 * 4
+; CHECK-NEXT: add sp, #12
; CHECK-NEXT: bx r3
entry:
%a.addr = alloca i8*
Modified: llvm/trunk/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll Thu Nov 19 00:57:41 2009
@@ -6,7 +6,7 @@
define arm_apcscc i32 @t(i32, ...) nounwind {
entry:
; CHECK: t:
-; CHECK: add r7, sp, #3 * 4
+; CHECK: add r7, sp, #12
%1 = load i8** undef, align 4 ; <i8*> [#uses=3]
%2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1]
%3 = getelementptr i8* %1, i32 8 ; <i8*> [#uses=1]
Modified: llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll Thu Nov 19 00:57:41 2009
@@ -6,7 +6,7 @@
entry:
; CHECK: __gcov_execlp:
; CHECK: mov sp, r7
-; CHECK: sub sp, #1 * 4
+; CHECK: sub sp, #4
call arm_aapcscc void @__gcov_flush() nounwind
br i1 undef, label %bb5, label %bb
Modified: llvm/trunk/test/CodeGen/Thumb2/large-stack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/large-stack.ll?rev=89328&r1=89327&r2=89328&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb2/large-stack.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb2/large-stack.ll Thu Nov 19 00:57:41 2009
@@ -2,7 +2,7 @@
define void @test1() {
; CHECK: test1:
-; CHECK: sub sp, #64 * 4
+; CHECK: sub sp, #256
%tmp = alloca [ 64 x i32 ] , align 4
ret void
}
@@ -10,7 +10,7 @@
define void @test2() {
; CHECK: test2:
; CHECK: sub.w sp, sp, #4160
-; CHECK: sub sp, #2 * 4
+; CHECK: sub sp, #8
%tmp = alloca [ 4168 x i8 ] , align 4
ret void
}
@@ -18,7 +18,7 @@
define i32 @test3() {
; CHECK: test3:
; CHECK: sub.w sp, sp, #805306368
-; CHECK: sub sp, #6 * 4
+; CHECK: sub sp, #24
%retval = alloca i32, align 4
%tmp = alloca i32, align 4
%a = alloca [805306369 x i8], align 16
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