[llvm-commits] [llvm] r88887 - /llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Sun Nov 15 20:35:29 PST 2009
Author: bruno
Date: Sun Nov 15 22:35:29 2009
New Revision: 88887
URL: http://llvm.org/viewvc/llvm-project?rev=88887&view=rev
Log:
Disable ldc1/sdc1 instructions for mips1 targets.
Modified:
llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=88887&r1=88886&r2=88887&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Sun Nov 15 22:35:29 2009
@@ -48,6 +48,7 @@
def In32BitMode : Predicate<"!Subtarget.isFP64bit()">;
def IsSingleFloat : Predicate<"Subtarget.isSingleFloat()">;
def IsNotSingleFloat : Predicate<"!Subtarget.isSingleFloat()">;
+def IsNotMipsI : Predicate<"!Subtarget.isMips1()">;
//===----------------------------------------------------------------------===//
// Instruction Class Templates
@@ -173,7 +174,7 @@
}
/// Floating Point Memory Instructions
-let Predicates = [IsNotSingleFloat] in {
+let Predicates = [IsNotSingleFloat, IsNotMipsI] in {
def LDC1 : FFI<0b110101, (outs AFGR64:$ft), (ins mem:$addr),
"ldc1 $ft, $addr", [(set AFGR64:$ft, (load addr:$addr))]>;
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