[llvm-commits] [llvm] r86851 - in /llvm/trunk/lib/Target: Alpha/AlphaInstrInfo.td Blackfin/BlackfinInstrInfo.td MSP430/MSP430InstrInfo.td Sparc/SparcInstrInfo.td XCore/XCoreInstrInfo.td

[Dan Gohman]

Author: djg
Date: Wed Nov 11 12:11:07 2009
New Revision: 86851

URL: http://llvm.org/viewvc/llvm-project?rev=86851&view=rev
Log:
Set isBarrier = 1 on return instructions, as they are control barriers.

Modified:
    llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
    llvm/trunk/lib/Target/Blackfin/BlackfinInstrInfo.td
    llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td
    llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td

Modified: llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td?rev=86851&r1=86850&r2=86851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaInstrInfo.td Wed Nov 11 12:11:07 2009
@@ -391,7 +391,7 @@
 def : Pat<(setune GPRC:$X, immUExt8:$Y), (CMPEQi (CMPEQ GPRC:$X, immUExt8:$Y), 0)>;
 
 
-let isReturn = 1, isTerminator = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
+let isReturn = 1, isTerminator = 1, isBarrier = 1, Ra = 31, Rb = 26, disp = 1, Uses = [R26] in {
   def RETDAG : MbrForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", s_jsr>; //Return from subroutine
   def RETDAGp : MbrpForm< 0x1A, 0x02, (ops), "ret $$31,($$26),1", [(retflag)], s_jsr>; //Return from subroutine
 }

Modified: llvm/trunk/lib/Target/Blackfin/BlackfinInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinInstrInfo.td?rev=86851&r1=86850&r2=86851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinInstrInfo.td Wed Nov 11 12:11:07 2009
@@ -174,6 +174,7 @@
 
 let isReturn     = 1,
     isTerminator = 1,
+    isBarrier    = 1,
     Uses         = [RETS] in
 def RTS: F1<(outs), (ins), "rts;", [(BfinRet)]>;
 

Modified: llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td?rev=86851&r1=86850&r2=86851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430InstrInfo.td Wed Nov 11 12:11:07 2009
@@ -127,7 +127,7 @@
 //
 
 // FIXME: Provide proper encoding!
-let isReturn = 1, isTerminator = 1 in {
+let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
   def RET : Pseudo<(outs), (ins), "ret", [(MSP430retflag)]>;
 }
 

Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td?rev=86851&r1=86850&r2=86851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Wed Nov 11 12:11:07 2009
@@ -277,7 +277,7 @@
 
 // Section A.3 - Synthetic Instructions, p. 85
 // special cases of JMPL:
-let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in {
+let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1 in {
   let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in
     def RETL: F3_2<2, 0b111000, (outs), (ins), "retl", [(retflag)]>;
 }

Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=86851&r1=86850&r2=86851&view=diff

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Wed Nov 11 12:11:07 2009
@@ -617,7 +617,7 @@
 let mayStore = 1 in
 defm ENTSP : FU6_LU6_np<"entsp">;
 
-let isReturn = 1, isTerminator = 1, mayLoad = 1 in {
+let isReturn = 1, isTerminator = 1, mayLoad = 1, isBarrier = 1 in {
 defm RETSP : FU6_LU6<"retsp", XCoreRetsp>;
 }
 }