[llvm-commits] [llvm] r86423 - in /llvm/trunk/lib/Target/ARM: ARMBaseInstrInfo.cpp ARMBaseInstrInfo.h ARMInstrInfo.cpp Thumb1InstrInfo.cpp Thumb1InstrInfo.h Thumb2InstrInfo.cpp Thumb2InstrInfo.h
Jim Grosbach
grosbach at apple.com
Sat Nov 7 16:27:09 PST 2009
Very nice. Good to see more commonality.
On Nov 7, 2009, at 4:15 PM, Evan Cheng wrote:
> Author: evancheng
> Date: Sat Nov 7 18:15:23 2009
> New Revision: 86423
>
> URL: http://llvm.org/viewvc/llvm-project?rev=86423&view=rev
> Log:
> Refactor code.
>
> Modified:
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
> llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.cpp
> llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.h
> llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
> llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Nov 7
> 18:15:23 2009
> @@ -18,6 +18,9 @@
> #include "ARMGenInstrInfo.inc"
> #include "ARMMachineFunctionInfo.h"
> #include "ARMRegisterInfo.h"
> +#include "llvm/Constants.h"
> +#include "llvm/Function.h"
> +#include "llvm/GlobalValue.h"
> #include "llvm/ADT/STLExtras.h"
> #include "llvm/CodeGen/LiveVariables.h"
> #include "llvm/CodeGen/MachineConstantPool.h"
> @@ -897,6 +900,57 @@
> return false;
> }
>
> +void ARMBaseInstrInfo::
> +reMaterialize(MachineBasicBlock &MBB,
> + MachineBasicBlock::iterator I,
> + unsigned DestReg, unsigned SubIdx,
> + const MachineInstr *Orig) const {
> + DebugLoc dl = Orig->getDebugLoc();
> + unsigned Opcode = Orig->getOpcode();
> + switch (Opcode) {
> + default: {
> + MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
> + MI->getOperand(0).setReg(DestReg);
> + MBB.insert(I, MI);
> + break;
> + }
> + case ARM::tLDRpci_pic:
> + case ARM::t2LDRpci_pic: {
> + MachineFunction &MF = *MBB.getParent();
> + ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
> + MachineConstantPool *MCP = MF.getConstantPool();
> + unsigned CPI = Orig->getOperand(1).getIndex();
> + const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
> + assert(MCPE.isMachineConstantPoolEntry() &&
> + "Expecting a machine constantpool entry!");
> + ARMConstantPoolValue *ACPV =
> + static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
> + unsigned PCLabelId = AFI->createConstPoolEntryUId();
> + ARMConstantPoolValue *NewCPV = 0;
> + if (ACPV->isGlobalValue())
> + NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
> + ARMCP::CPValue, 4);
> + else if (ACPV->isExtSymbol())
> + NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext
> (),
> + ACPV->getSymbol(),
> PCLabelId, 4);
> + else if (ACPV->isBlockAddress())
> + NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(),
> PCLabelId,
> + ARMCP::CPBlockAddress, 4);
> + else
> + llvm_unreachable("Unexpected ARM constantpool value type!!");
> + CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
> + MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(),
> get(Opcode),
> + DestReg)
> + .addConstantPoolIndex(CPI).addImm(PCLabelId);
> + (*MIB).setMemRefs(Orig->memoperands_begin(), Orig-
> >memoperands_end());
> + break;
> + }
> + }
> +
> + MachineInstr *NewMI = prior(I);
> + NewMI->getOperand(0).setSubReg(SubIdx);
> +}
> +
> bool ARMBaseInstrInfo::isIdentical(const MachineInstr *MI0,
> const MachineInstr *MI1,
> const MachineRegisterInfo *MRI)
> const {
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.h Sat Nov 7 18:15:23
> 2009
> @@ -264,6 +264,11 @@
> const
> SmallVectorImpl<unsigned> &Ops,
> MachineInstr* LoadMI)
> const;
>
> + virtual void reMaterialize(MachineBasicBlock &MBB,
> + MachineBasicBlock::iterator MI,
> + unsigned DestReg, unsigned SubIdx,
> + const MachineInstr *Orig) const;
> +
> virtual bool isIdentical(const MachineInstr *MI, const
> MachineInstr *Other,
> const MachineRegisterInfo *MRI) const;
> };
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Sat Nov 7 18:15:23
> 2009
> @@ -80,29 +80,26 @@
> }
>
> void ARMInstrInfo::
> -reMaterialize(MachineBasicBlock &MBB,
> - MachineBasicBlock::iterator I,
> +reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
> unsigned DestReg, unsigned SubIdx,
> const MachineInstr *Orig) const {
> DebugLoc dl = Orig->getDebugLoc();
> unsigned Opcode = Orig->getOpcode();
> switch (Opcode) {
> - default: {
> - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
> - MI->getOperand(0).setReg(DestReg);
> - MBB.insert(I, MI);
> + default:
> break;
> - }
> - case ARM::MOVi2pieces:
> + case ARM::MOVi2pieces: {
> RI.emitLoadConstPool(MBB, I, dl,
> DestReg, SubIdx,
> Orig->getOperand(1).getImm(),
> (ARMCC::CondCodes)Orig->getOperand(2).getImm
> (),
> Orig->getOperand(3).getReg());
> - break;
> + MachineInstr *NewMI = prior(I);
> + NewMI->getOperand(0).setSubReg(SubIdx);
> + return;
> + }
> }
>
> - MachineInstr *NewMI = prior(I);
> - NewMI->getOperand(0).setSubReg(SubIdx);
> + return ARMBaseInstrInfo::reMaterialize(MBB, I, DestReg, SubIdx,
> Orig);
> }
>
>
> Modified: llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.cpp?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.cpp Sat Nov 7
> 18:15:23 2009
> @@ -13,13 +13,8 @@
>
> #include "Thumb1InstrInfo.h"
> #include "ARM.h"
> -#include "ARMConstantPoolValue.h"
> #include "ARMGenInstrInfo.inc"
> #include "ARMMachineFunctionInfo.h"
> -#include "llvm/Constants.h"
> -#include "llvm/Function.h"
> -#include "llvm/GlobalValue.h"
> -#include "llvm/CodeGen/MachineConstantPool.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineInstrBuilder.h"
> #include "llvm/CodeGen/MachineMemOperand.h"
> @@ -268,53 +263,3 @@
>
> return NewMI;
> }
> -
> -void Thumb1InstrInfo::reMaterialize(MachineBasicBlock &MBB,
> - MachineBasicBlock::iterator I,
> - unsigned DestReg, unsigned
> SubIdx,
> - const MachineInstr *Orig) const {
> - DebugLoc dl = Orig->getDebugLoc();
> - unsigned Opcode = Orig->getOpcode();
> - switch (Opcode) {
> - default: {
> - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
> - MI->getOperand(0).setReg(DestReg);
> - MBB.insert(I, MI);
> - break;
> - }
> - case ARM::tLDRpci_pic: {
> - MachineFunction &MF = *MBB.getParent();
> - ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
> - MachineConstantPool *MCP = MF.getConstantPool();
> - unsigned CPI = Orig->getOperand(1).getIndex();
> - const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
> - assert(MCPE.isMachineConstantPoolEntry() &&
> - "Expecting a machine constantpool entry!");
> - ARMConstantPoolValue *ACPV =
> - static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
> - unsigned PCLabelId = AFI->createConstPoolEntryUId();
> - ARMConstantPoolValue *NewCPV = 0;
> - if (ACPV->isGlobalValue())
> - NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
> - ARMCP::CPValue, 4);
> - else if (ACPV->isExtSymbol())
> - NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext
> (),
> - ACPV->getSymbol(),
> PCLabelId, 4);
> - else if (ACPV->isBlockAddress())
> - NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(),
> PCLabelId,
> - ARMCP::CPBlockAddress, 4);
> - else
> - llvm_unreachable("Unexpected ARM constantpool value type!!");
> - CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
> - MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(),
> get(Opcode),
> - DestReg)
> - .addConstantPoolIndex(CPI).addImm(PCLabelId);
> - (*MIB).setMemRefs(Orig->memoperands_begin(), Orig-
> >memoperands_end());
> - break;
> - }
> - }
> -
> - MachineInstr *NewMI = prior(I);
> - NewMI->getOperand(0).setSubReg(SubIdx);
> -}
> -
>
> Modified: llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.h?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.h (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb1InstrInfo.h Sat Nov 7 18:15:23
> 2009
> @@ -76,10 +76,6 @@
> MachineInstr* LoadMI) const {
> return 0;
> }
> -
> - void reMaterialize(MachineBasicBlock &MBB,
> MachineBasicBlock::iterator MI,
> - unsigned DestReg, unsigned SubIdx,
> - const MachineInstr *Orig) const;
> };
> }
>
>
> Modified: llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.cpp Sat Nov 7
> 18:15:23 2009
> @@ -17,10 +17,6 @@
> #include "ARMAddressingModes.h"
> #include "ARMGenInstrInfo.inc"
> #include "ARMMachineFunctionInfo.h"
> -#include "llvm/Constants.h"
> -#include "llvm/Function.h"
> -#include "llvm/GlobalValue.h"
> -#include "llvm/CodeGen/MachineConstantPool.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineInstrBuilder.h"
> #include "llvm/CodeGen/MachineMemOperand.h"
> @@ -137,55 +133,6 @@
> ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC);
> }
>
> -void Thumb2InstrInfo::reMaterialize(MachineBasicBlock &MBB,
> - MachineBasicBlock::iterator I,
> - unsigned DestReg, unsigned
> SubIdx,
> - const MachineInstr *Orig) const {
> - DebugLoc dl = Orig->getDebugLoc();
> - unsigned Opcode = Orig->getOpcode();
> - switch (Opcode) {
> - default: {
> - MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
> - MI->getOperand(0).setReg(DestReg);
> - MBB.insert(I, MI);
> - break;
> - }
> - case ARM::t2LDRpci_pic: {
> - MachineFunction &MF = *MBB.getParent();
> - ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
> - MachineConstantPool *MCP = MF.getConstantPool();
> - unsigned CPI = Orig->getOperand(1).getIndex();
> - const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
> - assert(MCPE.isMachineConstantPoolEntry() &&
> - "Expecting a machine constantpool entry!");
> - ARMConstantPoolValue *ACPV =
> - static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
> - unsigned PCLabelId = AFI->createConstPoolEntryUId();
> - ARMConstantPoolValue *NewCPV = 0;
> - if (ACPV->isGlobalValue())
> - NewCPV = new ARMConstantPoolValue(ACPV->getGV(), PCLabelId,
> - ARMCP::CPValue, 4);
> - else if (ACPV->isExtSymbol())
> - NewCPV = new ARMConstantPoolValue(MF.getFunction()->getContext
> (),
> - ACPV->getSymbol(),
> PCLabelId, 4);
> - else if (ACPV->isBlockAddress())
> - NewCPV = new ARMConstantPoolValue(ACPV->getBlockAddress(),
> PCLabelId,
> - ARMCP::CPBlockAddress, 4);
> - else
> - llvm_unreachable("Unexpected ARM constantpool value type!!");
> - CPI = MCP->getConstantPoolIndex(NewCPV, MCPE.getAlignment());
> - MachineInstrBuilder MIB = BuildMI(MBB, I, Orig->getDebugLoc(),
> get(Opcode),
> - DestReg)
> - .addConstantPoolIndex(CPI).addImm(PCLabelId);
> - (*MIB).setMemRefs(Orig->memoperands_begin(), Orig-
> >memoperands_end());
> - break;
> - }
> - }
> -
> - MachineInstr *NewMI = prior(I);
> - NewMI->getOperand(0).setSubReg(SubIdx);
> -}
> -
> void llvm::emitT2RegPlusImmediate(MachineBasicBlock &MBB,
> MachineBasicBlock::iterator &MBBI,
> DebugLoc dl,
> unsigned DestReg, unsigned BaseReg,
> int NumBytes,
>
> Modified: llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h?rev=86423&r1=86422&r2=86423&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h (original)
> +++ llvm/trunk/lib/Target/ARM/Thumb2InstrInfo.h Sat Nov 7 18:15:23
> 2009
> @@ -50,10 +50,6 @@
> unsigned DestReg, int FrameIndex,
> const TargetRegisterClass *RC) const;
>
> - void reMaterialize(MachineBasicBlock &MBB,
> MachineBasicBlock::iterator MI,
> - unsigned DestReg, unsigned SubIdx,
> - const MachineInstr *Orig) const;
> -
> /// getRegisterInfo - TargetInstrInfo is a superset of MRegister
> info. As
> /// such, whenever a client has an instance of instruction info,
> it should
> /// always be able to get register info as well (through this
> method).
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list