[llvm-commits] [llvm] r86331 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Evan Cheng
evan.cheng at apple.com
Fri Nov 6 20:07:30 PST 2009
Author: evancheng
Date: Fri Nov 6 22:07:30 2009
New Revision: 86331
URL: http://llvm.org/viewvc/llvm-project?rev=86331&view=rev
Log:
Missed this.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=86331&r1=86330&r2=86331&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Fri Nov 6 22:07:30 2009
@@ -21,7 +21,6 @@
class MCAsmInfo;
class TargetRegisterClass;
-class TargetRegisterInfo;
class LiveVariables;
class CalleeSavedInfo;
class SDNode;
@@ -226,6 +225,14 @@
virtual bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1,
unsigned &SrcOpIdx2) const = 0;
+ /// isIdentical - Return true if two instructions are identical. This differs
+ /// from MachineInstr::isIdenticalTo() in that it does not require the
+ /// virtual destination registers to be the same. This is used by MachineLICM
+ /// and other MI passes to perform CSE.
+ virtual bool isIdentical(const MachineInstr *MI,
+ const MachineInstr *Other,
+ const MachineRegisterInfo *MRI) const = 0;
+
/// AnalyzeBranch - Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
/// implemented for a target). Upon success, this returns false and returns
@@ -510,6 +517,10 @@
MachineBasicBlock::iterator MI,
unsigned DestReg, unsigned SubReg,
const MachineInstr *Orig) const;
+ virtual bool isIdentical(const MachineInstr *MI,
+ const MachineInstr *Other,
+ const MachineRegisterInfo *MRI) const;
+
virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const;
};
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