[llvm-commits] [llvm] r85869 - /llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
Evan Cheng
evan.cheng at apple.com
Mon Nov 2 21:50:58 PST 2009
Author: evancheng
Date: Mon Nov 2 23:50:57 2009
New Revision: 85869
URL: http://llvm.org/viewvc/llvm-project?rev=85869&view=rev
Log:
Add QPR_8 as a superreg class of SPR_8 and DPR_8.
Modified:
llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td?rev=85869&r1=85868&r2=85869&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMRegisterInfo.td Mon Nov 2 23:50:57 2009
@@ -357,6 +357,13 @@
let SubRegClassList = [SPR, SPR, SPR, SPR, DPR_VFP2, DPR_VFP2];
}
+// Subset of QPR that have DPR_8 and SPR_8 subregs.
+def QPR_8 : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
+ 128,
+ [Q0, Q1, Q2, Q3]> {
+ let SubRegClassList = [SPR_8, SPR_8, SPR_8, SPR_8, DPR_8, DPR_8];
+}
+
// Condition code registers.
def CCR : RegisterClass<"ARM", [i32], 32, [CPSR]>;
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