[llvm-commits] [llvm] r84778 - in /llvm/trunk: lib/Target/ARM/ARMAddressingModes.h lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/Thumb2/thumb2-mov.ll test/CodeGen/Thumb2/thumb2-mov2.ll

[Chris Lattner]

On Oct 21, 2009, at 1:44 PM, Jim Grosbach wrote:

> Author: grosbach
> Date: Wed Oct 21 15:44:34 2009
> New Revision: 84778
>
> URL: http://llvm.org/viewvc/llvm-project?rev=84778&view=rev
> Log:
> Improve handling of immediates by splitting 32-bit immediates into  
> two 16-bit
> immediate operands when they will fit into the using instruction.

Nice

> -define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
> -;CHECK: t2_const_var2_1_fail_1:
> -;CHECK: movt
> +define i32 @t2_const_var2_1_ok_2(i32 %lhs) {
> +;CHECK: t2_const_var2_1_ok_2:
> +;CHECK: #11206656
> +;CHECK: #187

Please add the expected instructions opcodes too, there is no reason  
to be this "fuzzy".

-Chris

>     %ret = add i32 %lhs, 11206843 ; 0x00ab00bb
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_1_fail_2(i32 %lhs) {
> -;CHECK: t2_const_var2_1_fail_2:
> -;CHECK: movt
> +define i32 @t2_const_var2_1_ok_3(i32 %lhs) {
> +;CHECK: t2_const_var2_1_ok_3:
> +;CHECK: #11206827
> +;CHECK: #16777216
>     %ret = add i32 %lhs, 27984043 ; 0x01ab00ab
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_1_fail_3(i32 %lhs) {
> -;CHECK: t2_const_var2_1_fail_3:
> -;CHECK: movt
> +define i32 @t2_const_var2_1_ok_4(i32 %lhs) {
> +;CHECK: t2_const_var2_1_ok_4:
> +;CHECK: #16777472
> +;CHECK: #11206827
>     %ret = add i32 %lhs, 27984299 ; 0x01ab01ab
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_1_fail_4(i32 %lhs) {
> -;CHECK: t2_const_var2_1_fail_4:
> +define i32 @t2_const_var2_1_fail_1(i32 %lhs) {
> +;CHECK: t2_const_var2_1_fail_1:
> ;CHECK: movt
>     %ret = add i32 %lhs, 28027649 ; 0x01abab01
>     ret i32 %ret
> @@ -46,29 +49,31 @@
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
> -;CHECK: t2_const_var2_2_fail_1:
> -;CHECK: movt
> +define i32 @t2_const_var2_2_ok_2(i32 %lhs) {
> +;CHECK: t2_const_var2_2_ok_2:
> +;CHECK: #-1426063360
> +;CHECK: #47616
>     %ret = add i32 %lhs, 2868951552 ; 0xab00ba00
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_2_fail_2(i32 %lhs) {
> -;CHECK: t2_const_var2_2_fail_2:
> -;CHECK: movt
> +define i32 @t2_const_var2_2_ok_3(i32 %lhs) {
> +;CHECK: t2_const_var2_2_ok_3:
> +;CHECK: #-1426019584
>     %ret = add i32 %lhs, 2868947728 ; 0xab00ab10
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_2_fail_3(i32 %lhs) {
> -;CHECK: t2_const_var2_2_fail_3:
> -;CHECK: movt
> +define i32 @t2_const_var2_2_ok_4(i32 %lhs) {
> +;CHECK: t2_const_var2_2_ok_4:
> +;CHECK: #-1426019584
> +;CHECK: #1048592
>     %ret = add i32 %lhs, 2869996304 ; 0xab10ab10
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var2_2_fail_4(i32 %lhs) {
> -;CHECK: t2_const_var2_2_fail_4:
> +define i32 @t2_const_var2_2_fail_1(i32 %lhs) {
> +;CHECK: t2_const_var2_2_fail_1:
> ;CHECK: movt
>     %ret = add i32 %lhs, 279685904 ; 0x10abab10
>     ret i32 %ret
> @@ -125,9 +130,10 @@
>     ret i32 %ret
> }
>
> -define i32 @t2_const_var3_2_fail_1(i32 %lhs) {
> -;CHECK: t2_const_var3_2_fail_1:
> -;CHECK: movt
> +define i32 @t2_const_var3_2_ok_2(i32 %lhs) {
> +;CHECK: t2_const_var3_2_ok_2:
> +;CHECK: #2097152
> +;CHECK: #1843200
>     %ret = add i32 %lhs, 3940352 ; 0b00000000001111000010000000000000
>     ret i32 %ret
> }
>
> Modified: llvm/trunk/test/CodeGen/Thumb2/thumb2-mov2.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb2/thumb2-mov2.ll?rev=84778&r1=84777&r2=84778&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/CodeGen/Thumb2/thumb2-mov2.ll (original)
> +++ llvm/trunk/test/CodeGen/Thumb2/thumb2-mov2.ll Wed Oct 21  
> 15:44:34 2009
> @@ -55,10 +55,10 @@
>
> define i32 @t2MOVTi16_test_nomatch_1(i32 %a) {
> ; CHECK: t2MOVTi16_test_nomatch_1:
> -; CHECK:      movw r1, #16384
> -; CHECK-NEXT: movt r1, #154
> +; CHECK:      #8388608
> ; CHECK:      movw r1, #65535
> ; CHECK-NEXT: movt r1, #154
> +; CHECK:      #1720320
>     %1 = shl i32  255,   8
>     %2 = shl i32 1234,   8
>     %3 = or  i32   %1, 255  ; This give us 0xFFFF in %3
>
>
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