[llvm-commits] ARM .td patch to specify only the well-known encoding bits for imm6 and imm4 fields

[Bob Wilson]

Doh!  You pointed this out yesterday, and I thought I had fixed it in  
r84732, but instead of changing Inst{9-8}, I changed Inst{5-4}.  I'll  
revert that and apply your patch.

On Oct 21, 2009, at 10:36 AM, Johnny Chen wrote:

> Hi Bob,
>
> Thanks a lot!
> Also, there is a typo for the first argument passed to VST2LN<...>.
> The Inst{9-8} should be 0b01, not 0b00.
>
> <ARM-NEON.patch>
>
> On Oct 20, 2009, at 7:19 PM, Bob Wilson wrote:
>
>>
>> On Oct 20, 2009, at 12:01 PM, Bob Wilson wrote:
>>
>>>
>>> On Oct 20, 2009, at 10:49 AM, Johnny Chen wrote:
>>>
>>>> Hi,
>>>>
>>>> Refs: A8-754 (VSHLL and friends), A8-580 (VCVT between floating-
>>>> point and fixed-point, Advanced SIMD), A8-592 (VDUP scalar)
>>>>
>>>> This patch attempts to specify just the encoding bits described in
>>>> the manual for several vector shift, vector convert, and vector  
>>>> dupe
>>>> operations.
>>>>
>>>> One question I have is whether we should explicitly specify that
>>>> VCVT's imm6 is of the pattern '1xxxxx'.
>>>> In the submitted patch, I left the imm6 (Inst{21-16}) of VCVT
>>>> unspecified.
>>>>
>>>> Thanks.
>>>
>>> This is exactly the problem I was hoping to avoid.  Please see my
>>> response to your VEXT patch before we decide whether to use this
>>> approach.
>>
>> I've committed a revised version of your patch.  There was only one  
>> instruction left using the old N2VImm class, and that was really  
>> just a minor convenience.  I changed that one class to use N2V  
>> instead so that all the other cases can use the N2VImm name.  I  
>> also did some refactoring of the new multiclasses that you had  
>> added and made some whitespace changes, etc.
>