[llvm-commits] ARM .td patch to specify only the well-known encoding bits for imm6 and imm4 fields

[Bob Wilson]

On Oct 20, 2009, at 12:01 PM, Bob Wilson wrote:

> 
> On Oct 20, 2009, at 10:49 AM, Johnny Chen wrote:
> 
>> Hi,
>> 
>> Refs: A8-754 (VSHLL and friends), A8-580 (VCVT between floating- 
>> point and fixed-point, Advanced SIMD), A8-592 (VDUP scalar)
>> 
>> This patch attempts to specify just the encoding bits described in  
>> the manual for several vector shift, vector convert, and vector dupe
>> operations.
>> 
>> One question I have is whether we should explicitly specify that  
>> VCVT's imm6 is of the pattern '1xxxxx'.
>> In the submitted patch, I left the imm6 (Inst{21-16}) of VCVT  
>> unspecified.
>> 
>> Thanks.
> 
> This is exactly the problem I was hoping to avoid.  Please see my  
> response to your VEXT patch before we decide whether to use this  
> approach.

I've committed a revised version of your patch.  There was only one instruction left using the old N2VImm class, and that was really just a minor convenience.  I changed that one class to use N2V instead so that all the other cases can use the N2VImm name.  I also did some refactoring of the new multiclasses that you had added and made some whitespace changes, etc.