[llvm-commits] ARM .td patch to specify only the well-known encoding bits for imm6 and imm4 fields

[Johnny Chen]

Hi,

Refs: A8-754 (VSHLL and friends), A8-580 (VCVT between floating-point and fixed-point, Advanced SIMD), A8-592 (VDUP scalar)

This patch attempts to specify just the encoding bits described in the manual for several vector shift, vector convert, and vector dupe
operations.

One question I have is whether we should explicitly specify that VCVT's imm6 is of the pattern '1xxxxx'.
In the submitted patch, I left the imm6 (Inst{21-16}) of VCVT unspecified.

Thanks.

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