[llvm-commits] [llvm] r83651 - in /llvm/trunk/test/CodeGen/ARM: fp.ll fparith.ll fpcmp.ll fpconv.ll select.ll
Bob Wilson
bob.wilson at apple.com
Fri Oct 9 10:20:47 PDT 2009
Author: bwilson
Date: Fri Oct 9 12:20:46 2009
New Revision: 83651
URL: http://llvm.org/viewvc/llvm-project?rev=83651&view=rev
Log:
Convert some ARM tests with lots of greps to use FileCheck.
Modified:
llvm/trunk/test/CodeGen/ARM/fp.ll
llvm/trunk/test/CodeGen/ARM/fparith.ll
llvm/trunk/test/CodeGen/ARM/fpcmp.ll
llvm/trunk/test/CodeGen/ARM/fpconv.ll
llvm/trunk/test/CodeGen/ARM/select.ll
Modified: llvm/trunk/test/CodeGen/ARM/fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp.ll?rev=83651&r1=83650&r2=83651&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp.ll Fri Oct 9 12:20:46 2009
@@ -1,55 +1,71 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
-; RUN: grep fmsr %t | count 4
-; RUN: grep fsitos %t
-; RUN: grep fmrs %t | count 2
-; RUN: grep fsitod %t
-; RUN: grep fmrrd %t | count 3
-; RUN: not grep fmdrr %t
-; RUN: grep fldd %t
-; RUN: grep fuitod %t
-; RUN: grep fuitos %t
-; RUN: grep 1065353216 %t
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
define float @f(i32 %a) {
+;CHECK: f:
+;CHECK: fmsr
+;CHECK-NEXT: fsitos
+;CHECK-NEXT: fmrs
entry:
%tmp = sitofp i32 %a to float ; <float> [#uses=1]
ret float %tmp
}
define double @g(i32 %a) {
+;CHECK: g:
+;CHECK: fmsr
+;CHECK-NEXT: fsitod
+;CHECK-NEXT: fmrrd
entry:
%tmp = sitofp i32 %a to double ; <double> [#uses=1]
ret double %tmp
}
define double @uint_to_double(i32 %a) {
+;CHECK: uint_to_double:
+;CHECK: fmsr
+;CHECK-NEXT: fuitod
+;CHECK-NEXT: fmrrd
entry:
%tmp = uitofp i32 %a to double ; <double> [#uses=1]
ret double %tmp
}
define float @uint_to_float(i32 %a) {
+;CHECK: uint_to_float:
+;CHECK: fmsr
+;CHECK-NEXT: fuitos
+;CHECK-NEXT: fmrs
entry:
%tmp = uitofp i32 %a to float ; <float> [#uses=1]
ret float %tmp
}
define double @h(double* %v) {
+;CHECK: h:
+;CHECK: fldd
+;CHECK-NEXT: fmrrd
entry:
%tmp = load double* %v ; <double> [#uses=1]
ret double %tmp
}
define float @h2() {
+;CHECK: h2:
+;CHECK: 1065353216
entry:
ret float 1.000000e+00
}
define double @f2(double %a) {
+;CHECK: f2:
+;CHECK-NOT: fmdrr
ret double %a
}
define void @f3() {
+;CHECK: f3:
+;CHECK-NOT: fmdrr
+;CHECK: f4
entry:
%tmp = call double @f5( ) ; <double> [#uses=1]
call void @f4( double %tmp )
Modified: llvm/trunk/test/CodeGen/ARM/fparith.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fparith.ll?rev=83651&r1=83650&r2=83651&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fparith.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fparith.ll Fri Oct 9 12:20:46 2009
@@ -1,74 +1,88 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
-; RUN: grep fadds %t
-; RUN: grep faddd %t
-; RUN: grep fmuls %t
-; RUN: grep fmuld %t
-; RUN: grep eor %t
-; RUN: grep fnegd %t
-; RUN: grep fdivs %t
-; RUN: grep fdivd %t
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
define float @f1(float %a, float %b) {
+;CHECK: f1:
+;CHECK: fadds
entry:
%tmp = fadd float %a, %b ; <float> [#uses=1]
ret float %tmp
}
define double @f2(double %a, double %b) {
+;CHECK: f2:
+;CHECK: faddd
entry:
%tmp = fadd double %a, %b ; <double> [#uses=1]
ret double %tmp
}
define float @f3(float %a, float %b) {
+;CHECK: f3:
+;CHECK: fmuls
entry:
%tmp = fmul float %a, %b ; <float> [#uses=1]
ret float %tmp
}
define double @f4(double %a, double %b) {
+;CHECK: f4:
+;CHECK: fmuld
entry:
%tmp = fmul double %a, %b ; <double> [#uses=1]
ret double %tmp
}
define float @f5(float %a, float %b) {
+;CHECK: f5:
+;CHECK: fsubs
entry:
%tmp = fsub float %a, %b ; <float> [#uses=1]
ret float %tmp
}
define double @f6(double %a, double %b) {
+;CHECK: f6:
+;CHECK: fsubd
entry:
%tmp = fsub double %a, %b ; <double> [#uses=1]
ret double %tmp
}
define float @f7(float %a) {
+;CHECK: f7:
+;CHECK: eor
entry:
%tmp1 = fsub float -0.000000e+00, %a ; <float> [#uses=1]
ret float %tmp1
}
define double @f8(double %a) {
+;CHECK: f8:
+;CHECK: fnegd
entry:
%tmp1 = fsub double -0.000000e+00, %a ; <double> [#uses=1]
ret double %tmp1
}
define float @f9(float %a, float %b) {
+;CHECK: f9:
+;CHECK: fdivs
entry:
%tmp1 = fdiv float %a, %b ; <float> [#uses=1]
ret float %tmp1
}
define double @f10(double %a, double %b) {
+;CHECK: f10:
+;CHECK: fdivd
entry:
%tmp1 = fdiv double %a, %b ; <double> [#uses=1]
ret double %tmp1
}
define float @f11(float %a) {
+;CHECK: f11:
+;CHECK: bic
entry:
%tmp1 = call float @fabsf( float %a ) ; <float> [#uses=1]
ret float %tmp1
@@ -77,6 +91,8 @@
declare float @fabsf(float)
define double @f12(double %a) {
+;CHECK: f12:
+;CHECK: fabsd
entry:
%tmp1 = call double @fabs( double %a ) ; <double> [#uses=1]
ret double %tmp1
Modified: llvm/trunk/test/CodeGen/ARM/fpcmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpcmp.ll?rev=83651&r1=83650&r2=83651&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fpcmp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fpcmp.ll Fri Oct 9 12:20:46 2009
@@ -1,13 +1,9 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
-; RUN: grep movmi %t
-; RUN: grep moveq %t
-; RUN: grep movgt %t
-; RUN: grep movge %t
-; RUN: grep movne %t
-; RUN: grep fcmped %t | count 1
-; RUN: grep fcmpes %t | count 6
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
define i32 @f1(float %a) {
+;CHECK: f1:
+;CHECK: fcmpes
+;CHECK: movmi
entry:
%tmp = fcmp olt float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp1 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -15,6 +11,9 @@
}
define i32 @f2(float %a) {
+;CHECK: f2:
+;CHECK: fcmpes
+;CHECK: moveq
entry:
%tmp = fcmp oeq float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp2 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -22,6 +21,9 @@
}
define i32 @f3(float %a) {
+;CHECK: f3:
+;CHECK: fcmpes
+;CHECK: movgt
entry:
%tmp = fcmp ogt float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp3 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -29,6 +31,9 @@
}
define i32 @f4(float %a) {
+;CHECK: f4:
+;CHECK: fcmpes
+;CHECK: movge
entry:
%tmp = fcmp oge float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp4 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -36,6 +41,9 @@
}
define i32 @f5(float %a) {
+;CHECK: f5:
+;CHECK: fcmpes
+;CHECK: movls
entry:
%tmp = fcmp ole float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp5 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -43,6 +51,9 @@
}
define i32 @f6(float %a) {
+;CHECK: f6:
+;CHECK: fcmpes
+;CHECK: movne
entry:
%tmp = fcmp une float %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp6 = zext i1 %tmp to i32 ; <i32> [#uses=1]
@@ -50,6 +61,9 @@
}
define i32 @g1(double %a) {
+;CHECK: g1:
+;CHECK: fcmped
+;CHECK: movmi
entry:
%tmp = fcmp olt double %a, 1.000000e+00 ; <i1> [#uses=1]
%tmp7 = zext i1 %tmp to i32 ; <i32> [#uses=1]
Modified: llvm/trunk/test/CodeGen/ARM/fpconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpconv.ll?rev=83651&r1=83650&r2=83651&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fpconv.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fpconv.ll Fri Oct 9 12:20:46 2009
@@ -1,81 +1,101 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 > %t
-; RUN: grep fcvtsd %t
-; RUN: grep fcvtds %t
-; RUN: grep ftosizs %t
-; RUN: grep ftouizs %t
-; RUN: grep ftosizd %t
-; RUN: grep ftouizd %t
-; RUN: grep fsitos %t
-; RUN: grep fsitod %t
-; RUN: grep fuitos %t
-; RUN: grep fuitod %t
-; RUN: llc < %s -march=arm > %t
-; RUN: grep truncdfsf2 %t
-; RUN: grep extendsfdf2 %t
-; RUN: grep fixsfsi %t
-; RUN: grep fixunssfsi %t
-; RUN: grep fixdfsi %t
-; RUN: grep fixunsdfsi %t
-; RUN: grep floatsisf %t
-; RUN: grep floatsidf %t
-; RUN: grep floatunsisf %t
-; RUN: grep floatunsidf %t
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP
+; RUN: llc < %s -march=arm | FileCheck %s
define float @f1(double %x) {
+;CHECK-VFP: f1:
+;CHECK-VFP: fcvtsd
+;CHECK: f1:
+;CHECK: truncdfsf2
entry:
%tmp1 = fptrunc double %x to float ; <float> [#uses=1]
ret float %tmp1
}
define double @f2(float %x) {
+;CHECK-VFP: f2:
+;CHECK-VFP: fcvtds
+;CHECK: f2:
+;CHECK: extendsfdf2
entry:
%tmp1 = fpext float %x to double ; <double> [#uses=1]
ret double %tmp1
}
define i32 @f3(float %x) {
+;CHECK-VFP: f3:
+;CHECK-VFP: ftosizs
+;CHECK: f3:
+;CHECK: fixsfsi
entry:
%tmp = fptosi float %x to i32 ; <i32> [#uses=1]
ret i32 %tmp
}
define i32 @f4(float %x) {
+;CHECK-VFP: f4:
+;CHECK-VFP: ftouizs
+;CHECK: f4:
+;CHECK: fixunssfsi
entry:
%tmp = fptoui float %x to i32 ; <i32> [#uses=1]
ret i32 %tmp
}
define i32 @f5(double %x) {
+;CHECK-VFP: f5:
+;CHECK-VFP: ftosizd
+;CHECK: f5:
+;CHECK: fixdfsi
entry:
%tmp = fptosi double %x to i32 ; <i32> [#uses=1]
ret i32 %tmp
}
define i32 @f6(double %x) {
+;CHECK-VFP: f6:
+;CHECK-VFP: ftouizd
+;CHECK: f6:
+;CHECK: fixunsdfsi
entry:
%tmp = fptoui double %x to i32 ; <i32> [#uses=1]
ret i32 %tmp
}
define float @f7(i32 %a) {
+;CHECK-VFP: f7:
+;CHECK-VFP: fsitos
+;CHECK: f7:
+;CHECK: floatsisf
entry:
%tmp = sitofp i32 %a to float ; <float> [#uses=1]
ret float %tmp
}
define double @f8(i32 %a) {
+;CHECK-VFP: f8:
+;CHECK-VFP: fsitod
+;CHECK: f8:
+;CHECK: floatsidf
entry:
%tmp = sitofp i32 %a to double ; <double> [#uses=1]
ret double %tmp
}
define float @f9(i32 %a) {
+;CHECK-VFP: f9:
+;CHECK-VFP: fuitos
+;CHECK: f9:
+;CHECK: floatunsisf
entry:
%tmp = uitofp i32 %a to float ; <float> [#uses=1]
ret float %tmp
}
define double @f10(i32 %a) {
+;CHECK-VFP: f10:
+;CHECK-VFP: fuitod
+;CHECK: f10:
+;CHECK: floatunsidf
entry:
%tmp = uitofp i32 %a to double ; <double> [#uses=1]
ret double %tmp
Modified: llvm/trunk/test/CodeGen/ARM/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/select.ll?rev=83651&r1=83650&r2=83651&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/select.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/select.ll Fri Oct 9 12:20:46 2009
@@ -1,13 +1,9 @@
-; RUN: llc < %s -march=arm | grep moveq | count 1
-; RUN: llc < %s -march=arm | grep movgt | count 1
-; RUN: llc < %s -march=arm | grep movlt | count 3
-; RUN: llc < %s -march=arm | grep movle | count 1
-; RUN: llc < %s -march=arm | grep movls | count 1
-; RUN: llc < %s -march=arm | grep movhi | count 1
-; RUN: llc < %s -march=arm -mattr=+vfp2 | \
-; RUN: grep fcpydmi | count 1
+; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s --check-prefix=CHECK-VFP
define i32 @f1(i32 %a.s) {
+;CHECK: f1:
+;CHECK: moveq
entry:
%tmp = icmp eq i32 %a.s, 4
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -15,6 +11,8 @@
}
define i32 @f2(i32 %a.s) {
+;CHECK: f2:
+;CHECK: movgt
entry:
%tmp = icmp sgt i32 %a.s, 4
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -22,6 +20,8 @@
}
define i32 @f3(i32 %a.s, i32 %b.s) {
+;CHECK: f3:
+;CHECK: movlt
entry:
%tmp = icmp slt i32 %a.s, %b.s
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -29,6 +29,8 @@
}
define i32 @f4(i32 %a.s, i32 %b.s) {
+;CHECK: f4:
+;CHECK: movle
entry:
%tmp = icmp sle i32 %a.s, %b.s
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -36,6 +38,8 @@
}
define i32 @f5(i32 %a.u, i32 %b.u) {
+;CHECK: f5:
+;CHECK: movls
entry:
%tmp = icmp ule i32 %a.u, %b.u
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -43,6 +47,8 @@
}
define i32 @f6(i32 %a.u, i32 %b.u) {
+;CHECK: f6:
+;CHECK: movhi
entry:
%tmp = icmp ugt i32 %a.u, %b.u
%tmp1.s = select i1 %tmp, i32 2, i32 3
@@ -50,6 +56,11 @@
}
define double @f7(double %a, double %b) {
+;CHECK: f7:
+;CHECK: movlt
+;CHECK: movlt
+;CHECK-VFP: f7:
+;CHECK-VFP: fcpydmi
%tmp = fcmp olt double %a, 1.234e+00
%tmp1 = select i1 %tmp, double -1.000e+00, double %b
ret double %tmp1
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