[llvm-commits] [llvm] r83006 - in /llvm/trunk: include/llvm/Target/Target.td include/llvm/Target/TargetInstrInfo.h lib/Target/ARM/ARMBaseInstrInfo.cpp lib/Target/ARM/ARMCodeEmitter.cpp lib/Target/Alpha/AlphaCodeEmitter.cpp lib/Target/PowerPC/PPCCodeEmitter.cpp lib/Target/X86/AsmPrinter/X86MCInstLower.cpp lib/Target/X86/X86CodeEmitter.cpp lib/Target/X86/X86InstrInfo.cpp utils/TableGen/AsmWriterEmitter.cpp utils/TableGen/CodeEmitterGen.cpp utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp
Evan Cheng
evan.cheng at apple.com
Mon Sep 28 14:45:31 PDT 2009
Thanks!
Evan
On Sep 28, 2009, at 1:32 PM, Jakob Stoklund Olesen wrote:
> Author: stoklund
> Date: Mon Sep 28 15:32:26 2009
> New Revision: 83006
>
> URL: http://llvm.org/viewvc/llvm-project?rev=83006&view=rev
> Log:
> Introduce the TargetInstrInfo::KILL machine instruction and get rid
> of the
> unused DECLARE instruction.
>
> KILL is not yet used anywhere, it will replace
> TargetInstrInfo::IMPLICIT_DEF
> in the places where IMPLICIT_DEF is just used to alter liveness of
> physical
> registers.
>
> Modified:
> llvm/trunk/include/llvm/Target/Target.td
> llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
> llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
> llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
> llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> llvm/trunk/utils/TableGen/CodeEmitterGen.cpp
> llvm/trunk/utils/TableGen/CodeGenTarget.cpp
> llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
>
> Modified: llvm/trunk/include/llvm/Target/Target.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/Target/Target.td (original)
> +++ llvm/trunk/include/llvm/Target/Target.td Mon Sep 28 15:32:26 2009
> @@ -426,12 +426,12 @@
> let Namespace = "TargetInstrInfo";
> let hasCtrlDep = 1;
> }
> -def DECLARE : Instruction {
> +def KILL : Instruction {
> let OutOperandList = (ops);
> let InOperandList = (ops variable_ops);
> let AsmString = "";
> let Namespace = "TargetInstrInfo";
> - let hasCtrlDep = 1;
> + let neverHasSideEffects = 1;
> }
> def EXTRACT_SUBREG : Instruction {
> let OutOperandList = (ops unknown:$dst);
>
> Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
> +++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Sep 28
> 15:32:26 2009
> @@ -51,7 +51,10 @@
> DBG_LABEL = 2,
> EH_LABEL = 3,
> GC_LABEL = 4,
> - // FIXME: DECLARE is removed. Readjust enum values ?
> +
> + /// KILL - This instruction is a noop that is used only to
> adjust the liveness
> + /// of registers. This can be useful when dealing with sub-
> registers.
> + KILL = 5,
>
> /// EXTRACT_SUBREG - This instruction takes two operands: a
> register
> /// that has subregisters, and a subregister index. It returns the
>
> Modified: llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp Mon Sep 28
> 15:32:26 2009
> @@ -423,6 +423,7 @@
> default:
> llvm_unreachable("Unknown or unset size field for instr!");
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> case TargetInstrInfo::DBG_LABEL:
> case TargetInstrInfo::EH_LABEL:
> return 0;
>
> Modified: llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Mon Sep 28 15:32:26
> 2009
> @@ -611,6 +611,7 @@
> MCE.emitLabel(MI.getOperand(0).getImm());
> break;
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> case ARM::DWARF_LOC:
> // Do nothing.
> break;
>
> Modified: llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/Alpha/AlphaCodeEmitter.cpp Mon Sep 28
> 15:32:26 2009
> @@ -125,6 +125,7 @@
> case Alpha::PCLABEL:
> case Alpha::MEMLABEL:
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> break; //skip these
> }
> }
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCCodeEmitter.cpp Mon Sep 28
> 15:32:26 2009
> @@ -142,6 +142,7 @@
> MCE.emitLabel(MI.getOperand(0).getImm());
> break;
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> break; // pseudo opcode, no side effects
> case PPC::MovePCtoLR:
> case PPC::MovePCtoLR8:
>
> Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp (original)
> +++ llvm/trunk/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp Mon Sep
> 28 15:32:26 2009
> @@ -407,6 +407,8 @@
> case TargetInstrInfo::IMPLICIT_DEF:
> printImplicitDef(MI);
> return;
> + case TargetInstrInfo::KILL:
> + return;
> case X86::MOVPC32r: {
> MCInst TmpInst;
> // This is a pseudo op for a two instruction sequence with a
> label, which
>
> Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Mon Sep 28 15:32:26
> 2009
> @@ -596,6 +596,7 @@
> MCE.emitLabel(MI.getOperand(0).getImm());
> break;
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> case X86::DWARF_LOC:
> case X86::FP_REG_KILL:
> break;
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Sep 28 15:32:26
> 2009
> @@ -3061,6 +3061,7 @@
> case TargetInstrInfo::EH_LABEL:
> break;
> case TargetInstrInfo::IMPLICIT_DEF:
> + case TargetInstrInfo::KILL:
> case X86::DWARF_LOC:
> case X86::FP_REG_KILL:
> break;
>
> Modified: llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/AsmWriterEmitter.cpp Mon Sep 28
> 15:32:26 2009
> @@ -681,6 +681,8 @@
> << " } else if (MI->getOpcode() ==
> TargetInstrInfo::IMPLICIT_DEF) {\n"
> << " printImplicitDef(MI);\n"
> << " return;\n"
> + << " } else if (MI->getOpcode() == TargetInstrInfo::KILL) {\n"
> + << " return;\n"
> << " }\n\n";
>
> O << "\n#endif\n";
>
> Modified: llvm/trunk/utils/TableGen/CodeEmitterGen.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeEmitterGen.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/utils/TableGen/CodeEmitterGen.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeEmitterGen.cpp Mon Sep 28 15:32:26
> 2009
> @@ -29,7 +29,7 @@
> R->getName() == "DBG_LABEL" ||
> R->getName() == "EH_LABEL" ||
> R->getName() == "GC_LABEL" ||
> - R->getName() == "DECLARE" ||
> + R->getName() == "KILL" ||
> R->getName() == "EXTRACT_SUBREG" ||
> R->getName() == "INSERT_SUBREG" ||
> R->getName() == "IMPLICIT_DEF" ||
> @@ -106,7 +106,7 @@
> R->getName() == "DBG_LABEL" ||
> R->getName() == "EH_LABEL" ||
> R->getName() == "GC_LABEL" ||
> - R->getName() == "DECLARE" ||
> + R->getName() == "KILL" ||
> R->getName() == "EXTRACT_SUBREG" ||
> R->getName() == "INSERT_SUBREG" ||
> R->getName() == "IMPLICIT_DEF" ||
> @@ -144,7 +144,7 @@
> InstName == "DBG_LABEL"||
> InstName == "EH_LABEL"||
> InstName == "GC_LABEL"||
> - InstName == "DECLARE"||
> + InstName == "KILL"||
> InstName == "EXTRACT_SUBREG" ||
> InstName == "INSERT_SUBREG" ||
> InstName == "IMPLICIT_DEF" ||
>
> Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Mon Sep 28 15:32:26
> 2009
> @@ -308,9 +308,9 @@
> if (I == Instructions.end()) throw "Could not find 'GC_LABEL'
> instruction!";
> const CodeGenInstruction *GC_LABEL = &I->second;
>
> - I = getInstructions().find("DECLARE");
> - if (I == Instructions.end()) throw "Could not find 'DECLARE'
> instruction!";
> - const CodeGenInstruction *DECLARE = &I->second;
> + I = getInstructions().find("KILL");
> + if (I == Instructions.end()) throw "Could not find 'KILL'
> instruction!";
> + const CodeGenInstruction *KILL = &I->second;
>
> I = getInstructions().find("EXTRACT_SUBREG");
> if (I == Instructions.end())
> @@ -343,7 +343,7 @@
> NumberedInstructions.push_back(DBG_LABEL);
> NumberedInstructions.push_back(EH_LABEL);
> NumberedInstructions.push_back(GC_LABEL);
> - NumberedInstructions.push_back(DECLARE);
> + NumberedInstructions.push_back(KILL);
> NumberedInstructions.push_back(EXTRACT_SUBREG);
> NumberedInstructions.push_back(INSERT_SUBREG);
> NumberedInstructions.push_back(IMPLICIT_DEF);
> @@ -355,7 +355,7 @@
> &II->second != DBG_LABEL &&
> &II->second != EH_LABEL &&
> &II->second != GC_LABEL &&
> - &II->second != DECLARE &&
> + &II->second != KILL &&
> &II->second != EXTRACT_SUBREG &&
> &II->second != INSERT_SUBREG &&
> &II->second != IMPLICIT_DEF &&
>
> Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=83006&r1=83005&r2=83006&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Mon Sep 28
> 15:32:26 2009
> @@ -339,7 +339,7 @@
> R->getName() != "DBG_LABEL" &&
> R->getName() != "EH_LABEL" &&
> R->getName() != "GC_LABEL" &&
> - R->getName() != "DECLARE" &&
> + R->getName() != "KILL" &&
> R->getName() != "EXTRACT_SUBREG" &&
> R->getName() != "INSERT_SUBREG" &&
> R->getName() != "IMPLICIT_DEF" &&
>
>
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