[llvm-commits] [llvm] r82834 - in /llvm/trunk/lib/CodeGen: MachineLICM.cpp MachineSink.cpp

[Evan Cheng]

On Sep 28, 2009, at 8:20 AM, Dan Gohman wrote:

> I don't understand what you're asking here.  What do you mean, and
> what problem would it fix?

I see cases where instructions are using physical registers that were  
not defined at machinesink time. These are function arguments, etc. We  
should be able to sink them assuming the bb livein set is updated  
accordingly.

Evan

>
> Dan
>
> On Sep 26, 2009, at 10:17 PM, Evan Cheng wrote:
>
>> Why not just add the phys register uses to the destination's livein  
>> set?
>>
>> Evan
>>
>> On Sep 25, 2009, at 7:34 PM, Dan Gohman wrote:
>>
>>> Author: djg
>>> Date: Fri Sep 25 21:34:00 2009
>>> New Revision: 82834
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=82834&view=rev
>>> Log:
>>> Don't hoist or sink instructions with physreg uses if the physreg is
>>> allocatable. Even if it doesn't appear to have any defs, it may  
>>> latter
>>> on after register allocation.
>>>
>>> Modified:
>>>  llvm/trunk/lib/CodeGen/MachineLICM.cpp
>>>  llvm/trunk/lib/CodeGen/MachineSink.cpp
>>>
>>> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=82834&r1=82833&r2=82834&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> = 
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri Sep 25 21:34:00 2009
>>> @@ -44,6 +44,7 @@
>>>   const TargetMachine   *TM;
>>>   const TargetInstrInfo *TII;
>>>   const TargetRegisterInfo *TRI;
>>> +    BitVector AllocatableSet;
>>>
>>>   // Various analyses that we use...
>>>   MachineLoopInfo      *LI;      // Current MachineLoopInfo
>>> @@ -138,6 +139,7 @@
>>> TII = TM->getInstrInfo();
>>> TRI = TM->getRegisterInfo();
>>> RegInfo = &MF.getRegInfo();
>>> +  AllocatableSet = TRI->getAllocatableSet(MF);
>>>
>>> // Get our Loop information...
>>> LI = &getAnalysis<MachineLoopInfo>();
>>> @@ -261,13 +263,20 @@
>>>     // we can move it, but only if the def is dead.
>>>     if (MO.isUse()) {
>>>       // If the physreg has no defs anywhere, it's just an ambient  
>>> register
>>> -        // and we can freely move its uses.
>>> +        // and we can freely move its uses. Alternatively, if  
>>> it's allocatable,
>>> +        // it could get allocated to something with a def during  
>>> allocation.
>>>       if (!RegInfo->def_empty(Reg))
>>>         return false;
>>> +        if (AllocatableSet.test(Reg))
>>> +          return false;
>>>       // Check for a def among the register's aliases too.
>>> -        for (const unsigned *Alias = TRI->getAliasSet(Reg);  
>>> *Alias; ++Alias)
>>> -          if (!RegInfo->def_empty(*Alias))
>>> +        for (const unsigned *Alias = TRI->getAliasSet(Reg);  
>>> *Alias; ++Alias) {
>>> +          unsigned AliasReg = *Alias;
>>> +          if (!RegInfo->def_empty(AliasReg))
>>> +            return false;
>>> +          if (AllocatableSet.test(AliasReg))
>>>           return false;
>>> +        }
>>>       // Otherwise it's safe to move.
>>>       continue;
>>>     } else if (!MO.isDead()) {
>>>
>>> Modified: llvm/trunk/lib/CodeGen/MachineSink.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineSink.cpp?rev=82834&r1=82833&r2=82834&view=diff
>>>
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/CodeGen/MachineSink.cpp (original)
>>> +++ llvm/trunk/lib/CodeGen/MachineSink.cpp Fri Sep 25 21:34:00 2009
>>> @@ -39,6 +39,7 @@
>>>   MachineFunction       *CurMF; // Current MachineFunction
>>>   MachineRegisterInfo  *RegInfo; // Machine register information
>>>   MachineDominatorTree *DT;   // Machine dominator tree
>>> +    BitVector AllocatableSet;   // Which physregs are allocatable?
>>>
>>> public:
>>>   static char ID; // Pass identification
>>> @@ -99,6 +100,7 @@
>>> TRI = TM->getRegisterInfo();
>>> RegInfo = &CurMF->getRegInfo();
>>> DT = &getAnalysis<MachineDominatorTree>();
>>> +  AllocatableSet = TRI->getAllocatableSet(*CurMF);
>>>
>>> bool EverMadeChange = false;
>>>
>>> @@ -180,13 +182,20 @@
>>>     // we can move it, but only if the def is dead.
>>>     if (MO.isUse()) {
>>>       // If the physreg has no defs anywhere, it's just an ambient  
>>> register
>>> -        // and we can freely move its uses.
>>> +        // and we can freely move its uses. Alternatively, if  
>>> it's allocatable,
>>> +        // it could get allocated to something with a def during  
>>> allocation.
>>>       if (!RegInfo->def_empty(Reg))
>>>         return false;
>>> +        if (AllocatableSet.test(Reg))
>>> +          return false;
>>>       // Check for a def among the register's aliases too.
>>> -        for (const unsigned *Alias = TRI->getAliasSet(Reg);  
>>> *Alias; ++Alias)
>>> -          if (!RegInfo->def_empty(*Alias))
>>> +        for (const unsigned *Alias = TRI->getAliasSet(Reg);  
>>> *Alias; ++Alias) {
>>> +          unsigned AliasReg = *Alias;
>>> +          if (!RegInfo->def_empty(AliasReg))
>>> +            return false;
>>> +          if (AllocatableSet.test(AliasReg))
>>>           return false;
>>> +        }
>>>     } else if (!MO.isDead()) {
>>>       // A def that isn't dead. We can't move it.
>>>       return false;
>>>
>>>
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>>
>