[llvm-commits] [llvm] r82948 - in /llvm/trunk: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/ARM/ARMInstrInfo.cpp lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/CodeGen/ARM/t2-imm.ll

[Evan Cheng]

On Sep 27, 2009, at 4:52 PM, Anton Korobeynikov wrote:

>
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp?rev=82948&r1=82947&r2=82948&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.cpp Sun Sep 27 18:52:58  
> 2009
> @@ -96,6 +96,9 @@
>
>   MachineInstr *MI = MBB.getParent()->CloneMachineInstr(Orig);
>   MI->getOperand(0).setReg(DestReg);
> +  if (Orig->getOpcode() == ARM::MOVTi16)
> +    MI->getOperand(1).setReg(DestReg);
> +
>   MBB.insert(I, MI);
> }

Hmm. This is interesting. Since MOVTi16 has a register source operand,  
it's not safe for it to be rematerialized. This change is wrong, but  
it's not going to be exercised.

That said, I think it's good idea to re-materialize these  
instructions. So I believe the correct solution is to add a pseudo  
instruction that's printed as a pair of movw + movt instructions. That  
allows it to be re-materializable.

Evan

>
>
>

> +let isReMaterializable = 1, isAsCheapAsAMove = 1,
> +    Constraints = "$src = $dst" in
> +def MOVTi16 : AI1<0b1010, (outs GPR:$dst), (ins GPR:$src, i32imm: 
> $imm),
> +                  DPFrm, IIC_iMOVi,
> +                  "movt", " $dst, $imm",
> +                  [(set GPR:$dst,
> +                        (or (and GPR:$src, 0xffff),
> +                            lo16AllZero:$imm))]>, UnaryDP,
> +                  Requires<[IsARM, HasV6T2]> {
> +  let Inst{25} = 1;
> }