[llvm-commits] [llvm] r82812 - in /llvm/trunk/lib/CodeGen: LiveIntervalAnalysis.cpp MachineRegisterInfo.cpp RegAllocLinearScan.cpp
Dan Gohman
gohman at apple.com
Fri Sep 25 15:26:13 PDT 2009
Author: djg
Date: Fri Sep 25 17:26:13 2009
New Revision: 82812
URL: http://llvm.org/viewvc/llvm-project?rev=82812&view=rev
Log:
Simplify a few more uses of reg_iterator.
Modified:
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=82812&r1=82811&r2=82812&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Fri Sep 25 17:26:13 2009
@@ -1087,11 +1087,9 @@
SmallVector<MachineInstr*,16> &OtherCopies) {
bool HaveConflict = false;
unsigned NumIdent = 0;
- for (MachineRegisterInfo::reg_iterator ri = mri_->reg_begin(SrcInt.reg),
- re = mri_->reg_end(); ri != re; ++ri) {
+ for (MachineRegisterInfo::def_iterator ri = mri_->def_begin(SrcInt.reg),
+ re = mri_->def_end(); ri != re; ++ri) {
MachineOperand &O = ri.getOperand();
- if (!O.isDef())
- continue;
MachineInstr *MI = &*ri;
unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=82812&r1=82811&r2=82812&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Fri Sep 25 17:26:13 2009
@@ -110,11 +110,9 @@
MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
assert(Reg-TargetRegisterInfo::FirstVirtualRegister < VRegInfo.size() &&
"Invalid vreg!");
- for (reg_iterator I = reg_begin(Reg), E = reg_end(); I != E; ++I) {
- // Since we are in SSA form, we can stop at the first definition.
- if (I.getOperand().isDef())
- return &*I;
- }
+ // Since we are in SSA form, we can use the first definition.
+ if (!def_empty(Reg))
+ return &*def_begin(Reg);
return 0;
}
Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=82812&r1=82811&r2=82812&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Fri Sep 25 17:26:13 2009
@@ -397,10 +397,10 @@
// Remove unnecessary kills since a copy does not clobber the register.
if (li_->hasInterval(SrcReg)) {
LiveInterval &SrcLI = li_->getInterval(SrcReg);
- for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(cur.reg),
- E = mri_->reg_end(); I != E; ++I) {
+ for (MachineRegisterInfo::use_iterator I = mri_->use_begin(cur.reg),
+ E = mri_->use_end(); I != E; ++I) {
MachineOperand &O = I.getOperand();
- if (!O.isUse() || !O.isKill())
+ if (!O.isKill())
continue;
MachineInstr *MI = &*I;
if (SrcLI.liveAt(li_->getDefIndex(li_->getInstructionIndex(MI))))
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