[llvm-commits] [llvm] r82485 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/SimpleRegisterCoalescing.h test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll test/CodeGen/ARM/remat.ll test/CodeGen/X86/2008-02-22-ReMatBug.ll test/CodeGen/X86/2008-07-11-SpillerBug.ll test/CodeGen/X86/2009-04-20-LinearScanOpt.ll test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll test/CodeGen/X86/stack-color-with-reg.ll

[Bill Wendling]

On Sep 21, 2009, at 2:12 PM, Evan Cheng wrote:

> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Sep 21  
> 16:12:25 2009
> @@ -2535,7 +2535,8 @@
>   ReMatDefs.clear();
> }
>
> -bool SimpleRegisterCoalescing::isZeroLengthInterval(LiveInterval  
> *li) const {
> +/// Returns true if the given live interval is zero length.
> +static bool isZeroLengthInterval(LiveInterval *li, LiveIntervals  
> *li_) {
>   for (LiveInterval::Ranges::const_iterator
>          i = li->ranges.begin(), e = li->ranges.end(); i != e; ++i)
>     if (li_->getPrevIndex(i->end) > i->start)
> @@ -2543,6 +2544,97 @@
>   return true;
> }
>
> +void SimpleRegisterCoalescing::CalculateSpillWeights() {
> +  SmallSet<unsigned, 4> Processed;
> +  for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_- 
> >end();
> +       mbbi != mbbe; ++mbbi) {
> +    MachineBasicBlock* MBB = mbbi;
> +    MachineInstrIndex MBBEnd = li_->getMBBEndIdx(MBB);
> +    MachineLoop* loop = loopInfo->getLoopFor(MBB);
> +    unsigned loopDepth = loop ? loop->getLoopDepth() : 0;
> +    bool isExit = loop ? loop->isLoopExit(MBB) : false;
> +
> +    for (MachineBasicBlock::iterator mii = MBB->begin(), mie = MBB- 
> >end();
> +         mii != mie; ++mii) {
> +      MachineInstr *MI = mii;
> +
> +      for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
> +        const MachineOperand &mopi = MI->getOperand(i);
> +        if (!mopi.isReg() || mopi.getReg() == 0)
> +          continue;
> +        unsigned Reg = mopi.getReg();
> +        if (!TargetRegisterInfo::isVirtualRegister(mopi.getReg()))
> +          continue;
> +        // Multiple uses of reg by the same instruction. It should  
> not
> +        // contribute to spill weight again.
> +        if (!Processed.insert(Reg))
> +          continue;
> +
> +        bool HasDef = mopi.isDef();
> +        bool HasUse = mopi.isUse();
> +        for (unsigned j = i+1; j != e; ++j) {
> +          const MachineOperand &mopj = MI->getOperand(j);
> +          if (!mopj.isReg() || mopj.getReg() != Reg)
> +            continue;
> +          HasDef |= mopj.isDef();
> +          HasUse |= mopj.isUse();
> +        }
> +
This loop is dead is "HasDef" and "HasUse" are both true. :-)

-bw