[llvm-commits] [llvm] r82385 - in /llvm/trunk: lib/Target/X86/AsmPrinter/CMakeLists.txt lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h lib/Target/X86/X86InstrInfo.td test/MC/AsmParser/hello.s tools/llvm-mc/llvm-mc.cpp
Chris Lattner
sabre at nondot.org
Sun Sep 20 00:17:49 PDT 2009
Author: lattner
Date: Sun Sep 20 02:17:49 2009
New Revision: 82385
URL: http://llvm.org/viewvc/llvm-project?rev=82385&view=rev
Log:
Add an intel syntax MCInstPrinter implementation. You can now
transcode from AT&T to intel syntax with "llvm-mc foo.s -output-asm-variant=1"
Added:
llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h
Modified:
llvm/trunk/lib/Target/X86/AsmPrinter/CMakeLists.txt
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/test/MC/AsmParser/hello.s
llvm/trunk/tools/llvm-mc/llvm-mc.cpp
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/CMakeLists.txt?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/CMakeLists.txt Sun Sep 20 02:17:49 2009
@@ -5,6 +5,7 @@
X86ATTInstPrinter.cpp
X86AsmPrinter.cpp
X86IntelAsmPrinter.cpp
+ X86IntelInstPrinter.cpp
X86MCInstLower.cpp
)
add_dependencies(LLVMX86AsmPrinter X86CodeGenTable_gen)
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h Sun Sep 20 02:17:49 2009
@@ -94,9 +94,6 @@
void printi128mem(const MachineInstr *MI, unsigned OpNo) {
printMemReference(MI, OpNo);
}
- void printi256mem(const MachineInstr *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
- }
void printf32mem(const MachineInstr *MI, unsigned OpNo) {
printMemReference(MI, OpNo);
}
@@ -109,9 +106,6 @@
void printf128mem(const MachineInstr *MI, unsigned OpNo) {
printMemReference(MI, OpNo);
}
- void printf256mem(const MachineInstr *MI, unsigned OpNo) {
- printMemReference(MI, OpNo);
- }
void printlea32mem(const MachineInstr *MI, unsigned OpNo) {
printLeaMemReference(MI, OpNo);
}
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp Sun Sep 20 02:17:49 2009
@@ -18,6 +18,7 @@
#include "X86ATTAsmPrinter.h"
#include "X86IntelAsmPrinter.h"
#include "X86ATTInstPrinter.h"
+#include "X86IntelInstPrinter.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Target/TargetRegistry.h"
using namespace llvm;
@@ -42,8 +43,8 @@
raw_ostream &O) {
if (SyntaxVariant == 0)
return new X86ATTInstPrinter(O, MAI);
-
- // Don't support intel syntax instprinter yet.
+ if (SyntaxVariant == 1)
+ return new X86IntelInstPrinter(O, MAI);
return 0;
}
Added: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp?rev=82385&view=auto
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp (added)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.cpp Sun Sep 20 02:17:49 2009
@@ -0,0 +1,138 @@
+//===-- X86IntelInstPrinter.cpp - AT&T assembly instruction printing --------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file includes code for rendering MCInst instances as AT&T-style
+// assembly.
+//
+//===----------------------------------------------------------------------===//
+
+#define DEBUG_TYPE "asm-printer"
+#include "X86IntelInstPrinter.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/FormattedStream.h"
+#include "X86GenInstrNames.inc"
+using namespace llvm;
+
+// Include the auto-generated portion of the assembly writer.
+#define MachineInstr MCInst
+#define NO_ASM_WRITER_BOILERPLATE
+#define X86IntelAsmPrinter X86IntelInstPrinter
+#include "X86GenAsmWriter1.inc"
+#undef MachineInstr
+
+void X86IntelInstPrinter::printInst(const MCInst *MI) { printInstruction(MI); }
+
+void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op) {
+ switch (MI->getOperand(Op).getImm()) {
+ default: llvm_unreachable("Invalid ssecc argument!");
+ case 0: O << "eq"; break;
+ case 1: O << "lt"; break;
+ case 2: O << "le"; break;
+ case 3: O << "unord"; break;
+ case 4: O << "neq"; break;
+ case 5: O << "nlt"; break;
+ case 6: O << "nle"; break;
+ case 7: O << "ord"; break;
+ }
+}
+
+void X86IntelInstPrinter::printPICLabel(const MCInst *MI, unsigned Op) {
+ llvm_unreachable("This is only used for MOVPC32r,"
+ "should lower before instruction printing!");
+}
+
+/// print_pcrel_imm - This is used to print an immediate value that ends up
+/// being encoded as a pc-relative value. These print slightly differently, for
+/// example, a $ is not emitted.
+void X86IntelInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo) {
+ const MCOperand &Op = MI->getOperand(OpNo);
+ if (Op.isImm())
+ O << Op.getImm();
+ else {
+ assert(Op.isExpr() && "unknown pcrel immediate operand");
+ Op.getExpr()->print(O, &MAI);
+ }
+}
+
+static void PrintRegName(raw_ostream &O, StringRef RegName) {
+ for (unsigned i = 0, e = RegName.size(); i != e; ++i)
+ O << (char)toupper(RegName[i]);
+}
+
+void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
+ const char *Modifier) {
+ assert(Modifier == 0 && "Modifiers should not be used");
+
+ const MCOperand &Op = MI->getOperand(OpNo);
+ if (Op.isReg()) {
+ PrintRegName(O, getRegisterName(Op.getReg()));
+ } else if (Op.isImm()) {
+ O << Op.getImm();
+ } else {
+ assert(Op.isExpr() && "unknown operand kind in printOperand");
+ Op.getExpr()->print(O, &MAI);
+ }
+}
+
+void X86IntelInstPrinter::printLeaMemReference(const MCInst *MI, unsigned Op) {
+ const MCOperand &BaseReg = MI->getOperand(Op);
+ unsigned ScaleVal = MI->getOperand(Op+1).getImm();
+ const MCOperand &IndexReg = MI->getOperand(Op+2);
+ const MCOperand &DispSpec = MI->getOperand(Op+3);
+
+ O << '[';
+
+ bool NeedPlus = false;
+ if (BaseReg.getReg()) {
+ printOperand(MI, Op);
+ NeedPlus = true;
+ }
+
+ if (IndexReg.getReg()) {
+ if (NeedPlus) O << " + ";
+ if (ScaleVal != 1)
+ O << ScaleVal << '*';
+ printOperand(MI, Op+2);
+ NeedPlus = true;
+ }
+
+
+ if (!DispSpec.isImm()) {
+ if (NeedPlus) O << " + ";
+ assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
+ DispSpec.getExpr()->print(O, &MAI);
+ } else {
+ int64_t DispVal = DispSpec.getImm();
+ if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
+ if (NeedPlus) {
+ if (DispVal > 0)
+ O << " + ";
+ else {
+ O << " - ";
+ DispVal = -DispVal;
+ }
+ }
+ O << DispVal;
+ }
+ }
+
+ O << ']';
+}
+
+void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op) {
+ // If this has a segment register, print it.
+ if (MI->getOperand(Op+4).getReg()) {
+ printOperand(MI, Op+4);
+ O << ':';
+ }
+ printLeaMemReference(MI, Op);
+}
Added: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h?rev=82385&view=auto
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h (added)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelInstPrinter.h Sun Sep 20 02:17:49 2009
@@ -0,0 +1,100 @@
+//===-- X86IntelInstPrinter.h - Convert X86 MCInst to assembly syntax -----===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This class prints an X86 MCInst to intel style .s file syntax.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef X86_INTEL_INST_PRINTER_H
+#define X86_INTEL_INST_PRINTER_H
+
+#include "llvm/MC/MCInstPrinter.h"
+#include "llvm/Support/raw_ostream.h"
+
+namespace llvm {
+ class MCOperand;
+
+class X86IntelInstPrinter : public MCInstPrinter {
+public:
+ X86IntelInstPrinter(raw_ostream &O, const MCAsmInfo &MAI)
+ : MCInstPrinter(O, MAI) {}
+
+ virtual void printInst(const MCInst *MI);
+
+ // Autogenerated by tblgen.
+ void printInstruction(const MCInst *MI);
+ static const char *getRegisterName(unsigned RegNo);
+
+
+ void printOperand(const MCInst *MI, unsigned OpNo,
+ const char *Modifier = 0);
+ void printMemReference(const MCInst *MI, unsigned Op);
+ void printLeaMemReference(const MCInst *MI, unsigned Op);
+ void printSSECC(const MCInst *MI, unsigned Op);
+ void printPICLabel(const MCInst *MI, unsigned Op);
+ void print_pcrel_imm(const MCInst *MI, unsigned OpNo);
+
+ void printopaquemem(const MCInst *MI, unsigned OpNo) {
+ O << "OPAQUE PTR ";
+ printMemReference(MI, OpNo);
+ }
+
+ void printi8mem(const MCInst *MI, unsigned OpNo) {
+ O << "BYTE PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printi16mem(const MCInst *MI, unsigned OpNo) {
+ O << "WORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printi32mem(const MCInst *MI, unsigned OpNo) {
+ O << "DWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printi64mem(const MCInst *MI, unsigned OpNo) {
+ O << "QWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printi128mem(const MCInst *MI, unsigned OpNo) {
+ O << "XMMWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printf32mem(const MCInst *MI, unsigned OpNo) {
+ O << "DWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printf64mem(const MCInst *MI, unsigned OpNo) {
+ O << "QWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printf80mem(const MCInst *MI, unsigned OpNo) {
+ O << "XWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printf128mem(const MCInst *MI, unsigned OpNo) {
+ O << "XMMWORD PTR ";
+ printMemReference(MI, OpNo);
+ }
+ void printlea32mem(const MCInst *MI, unsigned OpNo) {
+ O << "DWORD PTR ";
+ printLeaMemReference(MI, OpNo);
+ }
+ void printlea64mem(const MCInst *MI, unsigned OpNo) {
+ O << "QWORD PTR ";
+ printLeaMemReference(MI, OpNo);
+ }
+ void printlea64_32mem(const MCInst *MI, unsigned OpNo) {
+ O << "QWORD PTR ";
+ printLeaMemReference(MI, OpNo);
+ }
+};
+
+}
+
+#endif
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Sun Sep 20 02:17:49 2009
@@ -201,12 +201,12 @@
def i32mem : X86MemOperand<"printi32mem">;
def i64mem : X86MemOperand<"printi64mem">;
def i128mem : X86MemOperand<"printi128mem">;
-def i256mem : X86MemOperand<"printi256mem">;
+//def i256mem : X86MemOperand<"printi256mem">;
def f32mem : X86MemOperand<"printf32mem">;
def f64mem : X86MemOperand<"printf64mem">;
def f80mem : X86MemOperand<"printf80mem">;
def f128mem : X86MemOperand<"printf128mem">;
-def f256mem : X86MemOperand<"printf256mem">;
+//def f256mem : X86MemOperand<"printf256mem">;
// A version of i8mem for use on x86-64 that uses GR64_NOREX instead of
// plain GR64, so that it doesn't potentially require a REX prefix.
Modified: llvm/trunk/test/MC/AsmParser/hello.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/hello.s?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/hello.s (original)
+++ llvm/trunk/test/MC/AsmParser/hello.s Sun Sep 20 02:17:49 2009
@@ -1,4 +1,5 @@
// RUN: llvm-mc -triple i386-unknown-unknown %s -o -
+// RUN: llvm-mc -triple i386-unknown-unknown %s -o - -output-asm-variant=1
.text
.align 4,0x90
Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=82385&r1=82384&r2=82385&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
+++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Sun Sep 20 02:17:49 2009
@@ -44,6 +44,10 @@
static cl::opt<bool>
ShowEncoding("show-encoding", cl::desc("Show instruction encodings"));
+static cl::opt<unsigned>
+OutputAsmVariant("output-asm-variant",
+ cl::desc("Syntax variant to use for output printing"));
+
enum OutputFileType {
OFT_AssemblyFile,
OFT_ObjectFile
@@ -252,9 +256,7 @@
assert(MAI && "Unable to create target asm info!");
if (FileType == OFT_AssemblyFile) {
- // FIXME: Syntax Variant should be selectable somehow?
- unsigned SyntaxVariant = 0;
- IP.reset(TheTarget->createMCInstPrinter(SyntaxVariant, *MAI, *Out));
+ IP.reset(TheTarget->createMCInstPrinter(OutputAsmVariant, *MAI, *Out));
if (ShowEncoding)
CE.reset(TheTarget->createCodeEmitter(*TM));
Str.reset(createAsmStreamer(Ctx, *Out, *MAI, IP.get(), CE.get()));
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