[llvm-commits] [llvm] r82089 - in /llvm/trunk/lib/Target/X86: X86Instr64bit.td X86InstrInfo.td

[Sean Callanan]

Author: spyffe
Date: Wed Sep 16 17:59:28 2009
New Revision: 82089

URL: http://llvm.org/viewvc/llvm-project?rev=82089&view=rev
Log:
Added the LODS (load byte into register, usually
as part string parsing) instructions to the Intel
instruction tables.

Modified:
    llvm/trunk/lib/Target/X86/X86Instr64bit.td
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=82089&r1=82088&r2=82089&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Wed Sep 16 17:59:28 2009
@@ -1548,6 +1548,10 @@
                  "lar{q}\t{$src, $dst|$dst, $src}", []>, TB;
 def LAR64rr : RI<0x02, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
                  "lar{q}\t{$src, $dst|$dst, $src}", []>, TB;
+                 
+// String manipulation instructions
+
+def LODSQ : RI<0xAD, RawFrm, (outs), (ins), "lodsq", []>;
 
 //===----------------------------------------------------------------------===//
 // Non-Instruction Patterns

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=82089&r1=82088&r2=82089&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Wed Sep 16 17:59:28 2009
@@ -3684,6 +3684,12 @@
                 "lar{l}\t{$src, $dst|$dst, $src}", []>, TB;
 def LAR32rr : I<0x02, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
                 "lar{l}\t{$src, $dst|$dst, $src}", []>, TB;
+                
+// String manipulation instructions
+
+def LODSB : I<0xAC, RawFrm, (outs), (ins), "lodsb", []>;
+def LODSW : I<0xAD, RawFrm, (outs), (ins), "lodsw", []>, OpSize;
+def LODSD : I<0xAD, RawFrm, (outs), (ins), "lodsd", []>;
 
 //===----------------------------------------------------------------------===//
 // Non-Instruction Patterns