[llvm-commits] [llvm] r81923 - in /llvm/trunk/lib/Target/X86: X86Instr64bit.td X86InstrInfo.td
Sean Callanan
scallanan at apple.com
Tue Sep 15 14:43:27 PDT 2009
Author: spyffe
Date: Tue Sep 15 16:43:27 2009
New Revision: 81923
URL: http://llvm.org/viewvc/llvm-project?rev=81923&view=rev
Log:
Updated comments per Eli's suggestion.
Modified:
llvm/trunk/lib/Target/X86/X86Instr64bit.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=81923&r1=81922&r2=81923&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Sep 15 16:43:27 2009
@@ -458,7 +458,8 @@
[(set GR64:$dst, (add GR64:$src1, (load addr:$src2))),
(implicit EFLAGS)]>;
-// Register-Register Addition
+// Register-Register Addition - Equivalent to the normal rr form (ADD64rr), but
+// differently encoded.
def ADD64mrmrr : RI<0x03, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
"add{l}\t{$src2, $dst|$dst, $src2}", []>;
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=81923&r1=81922&r2=81923&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Sep 15 16:43:27 2009
@@ -2428,7 +2428,8 @@
[(set GR32:$dst, (add GR32:$src1, (load addr:$src2))),
(implicit EFLAGS)]>;
-// Register-Register Addition
+// Register-Register Addition - Equivalent to the normal rr forms (ADD8rr,
+// ADD16rr, and ADD32rr), but differently encoded.
def ADD8mrmrr: I<0x02, MRMSrcReg, (outs GR8:$dst), (ins GR8:$src1, GR8:$src2),
"add{b}\t{$src2, $dst|$dst, $src2}", []>;
def ADD16mrmrr: I<0x03, MRMSrcReg,(outs GR16:$dst),(ins GR16:$src1, GR16:$src2),
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