[llvm-commits] [llvm] r81886 - in /llvm/trunk: lib/Target/X86/X86InstrBuilder.h test/CodeGen/X86/fast-isel-gep.ll
Chris Lattner
sabre at nondot.org
Tue Sep 15 11:27:02 PDT 2009
Author: lattner
Date: Tue Sep 15 13:27:02 2009
New Revision: 81886
URL: http://llvm.org/viewvc/llvm-project?rev=81886&view=rev
Log:
fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement
values to machineinstrs.
Modified:
llvm/trunk/lib/Target/X86/X86InstrBuilder.h
llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrBuilder.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrBuilder.h?rev=81886&r1=81885&r2=81886&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrBuilder.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrBuilder.h Tue Sep 15 13:27:02 2009
@@ -47,7 +47,7 @@
unsigned Scale;
unsigned IndexReg;
- unsigned Disp;
+ int Disp;
GlobalValue *GV;
unsigned GVOpFlags;
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll?rev=81886&r1=81885&r2=81886&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-gep.ll Tue Sep 15 13:27:02 2009
@@ -1,10 +1,9 @@
; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s --check-prefix=X64
; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32
-; PR3181
; GEP indices are interpreted as signed integers, so they
; should be sign-extended to 64 bits on 64-bit targets.
-
+; PR3181
define i32 @test1(i32 %t3, i32* %t1) nounwind {
%t9 = getelementptr i32* %t1, i32 %t3 ; <i32*> [#uses=1]
%t15 = load i32* %t9 ; <i32> [#uses=1]
@@ -31,3 +30,24 @@
; X64: movl (%rsi,%rdi,4), %eax
; X64: ret
}
+
+
+
+; PR4984
+define i8 @test3(i8* %start) nounwind {
+entry:
+ %A = getelementptr i8* %start, i64 -2 ; <i8*> [#uses=1]
+ %B = load i8* %A, align 1 ; <i8> [#uses=1]
+ ret i8 %B
+
+
+; X32: test3:
+; X32: movl 4(%esp), %eax
+; X32: movb -2(%eax), %al
+; X32: ret
+
+; X64: test3:
+; X64: movb -2(%rdi), %al
+; X64: ret
+
+}
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