[llvm-commits] [llvm] r81823 - in /llvm/trunk/test/CodeGen/X86: cmov-i8-eflags.ll cmov.ll select-no-cmov.ll
Chris Lattner
sabre at nondot.org
Mon Sep 14 19:25:21 PDT 2009
Author: lattner
Date: Mon Sep 14 21:25:21 2009
New Revision: 81823
URL: http://llvm.org/viewvc/llvm-project?rev=81823&view=rev
Log:
merge some more cmov tests into cmov.ll
Removed:
llvm/trunk/test/CodeGen/X86/cmov-i8-eflags.ll
llvm/trunk/test/CodeGen/X86/select-no-cmov.ll
Modified:
llvm/trunk/test/CodeGen/X86/cmov.ll
Removed: llvm/trunk/test/CodeGen/X86/cmov-i8-eflags.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov-i8-eflags.ll?rev=81822&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmov-i8-eflags.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmov-i8-eflags.ll (removed)
@@ -1,61 +0,0 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
-; PR4814
-
-; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
-; move without recomputing EFLAGS, because the expansion of the conditional
-; move with control flow may clobber EFLAGS (e.g., with xor, to set the
-; register to zero).
-
-; The test is a little awkward; the important part is that there's a test before the
-; setne.
-
-target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
-
- at g_3 = external global i8 ; <i8*> [#uses=1]
- at g_96 = external global i8 ; <i8*> [#uses=2]
- at g_100 = external global i8 ; <i8*> [#uses=2]
- at _2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1]
-
-define i32 @main() nounwind {
-entry:
- %0 = load i8* @g_3, align 1 ; <i8> [#uses=2]
- %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
- %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1]
- %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1]
- %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1]
- %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1]
- %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
- %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2]
- %g_96.promoted.i = load i8* @g_96 ; <i8> [#uses=3]
- %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2]
- br i1 %3, label %func_4.exit.i, label %bb.i.i.i
-
-bb.i.i.i: ; preds = %entry
- %4 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
- br label %func_4.exit.i
-
-; CHECK: g_100
-; CHECK: testb
-; CHECK: testb %al, %al
-; CHECK-NEXT: setne %al
-; CHECK-NEXT: testb
-
-func_4.exit.i: ; preds = %bb.i.i.i, %entry
- %.not.i = xor i1 %2, true ; <i1> [#uses=1]
- %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1]
- %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
- br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
-
-bb.i.i: ; preds = %func_4.exit.i
- %5 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
- br label %func_1.exit
-
-func_1.exit: ; preds = %bb.i.i, %func_4.exit.i
- %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
- store i8 %g_96.tmp.0.i, i8* @g_96
- %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1]
- %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
- ret i32 0
-}
-
-declare i32 @printf(i8* nocapture, ...) nounwind
Modified: llvm/trunk/test/CodeGen/X86/cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cmov.ll?rev=81823&r1=81822&r2=81823&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cmov.ll Mon Sep 14 21:25:21 2009
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
entry:
@@ -46,3 +47,97 @@
call void @bar(i64 %f)
ret void
}
+
+
+
+; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
+; move without recomputing EFLAGS, because the expansion of the conditional
+; move with control flow may clobber EFLAGS (e.g., with xor, to set the
+; register to zero).
+
+; The test is a little awkward; the important part is that there's a test before the
+; setne.
+; PR4814
+
+
+ at g_3 = external global i8 ; <i8*> [#uses=1]
+ at g_96 = external global i8 ; <i8*> [#uses=2]
+ at g_100 = external global i8 ; <i8*> [#uses=2]
+ at _2E_str = external constant [15 x i8], align 1 ; <[15 x i8]*> [#uses=1]
+
+define i32 @test4() nounwind {
+entry:
+ %0 = load i8* @g_3, align 1 ; <i8> [#uses=2]
+ %1 = sext i8 %0 to i32 ; <i32> [#uses=1]
+ %.lobit.i = lshr i8 %0, 7 ; <i8> [#uses=1]
+ %tmp.i = zext i8 %.lobit.i to i32 ; <i32> [#uses=1]
+ %tmp.not.i = xor i32 %tmp.i, 1 ; <i32> [#uses=1]
+ %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i ; <i32> [#uses=1]
+ %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
+ %2 = icmp eq i8 %retval56.i.i, 0 ; <i1> [#uses=2]
+ %g_96.promoted.i = load i8* @g_96 ; <i8> [#uses=3]
+ %3 = icmp eq i8 %g_96.promoted.i, 0 ; <i1> [#uses=2]
+ br i1 %3, label %func_4.exit.i, label %bb.i.i.i
+
+bb.i.i.i: ; preds = %entry
+ %4 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
+ br label %func_4.exit.i
+
+; CHECK: test4:
+; CHECK: g_100
+; CHECK: testb
+; CHECK: testb %al, %al
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: testb
+
+func_4.exit.i: ; preds = %bb.i.i.i, %entry
+ %.not.i = xor i1 %2, true ; <i1> [#uses=1]
+ %brmerge.i = or i1 %3, %.not.i ; <i1> [#uses=1]
+ %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
+ br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
+
+bb.i.i: ; preds = %func_4.exit.i
+ %5 = volatile load i8* @g_100, align 1 ; <i8> [#uses=0]
+ br label %func_1.exit
+
+func_1.exit: ; preds = %bb.i.i, %func_4.exit.i
+ %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
+ store i8 %g_96.tmp.0.i, i8* @g_96
+ %6 = zext i8 %g_96.tmp.0.i to i32 ; <i32> [#uses=1]
+ %7 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
+ ret i32 0
+}
+
+declare i32 @printf(i8* nocapture, ...) nounwind
+
+
+; Should compile to setcc | -2.
+; rdar://6668608
+define i32 @test5(i32* nocapture %P) nounwind readonly {
+entry:
+; CHECK: test5:
+; CHECK: setg %al
+; CHECK: movzbl %al, %eax
+; CHECK: orl $-2, %eax
+; CHECK: ret
+
+ %0 = load i32* %P, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
+ ret i32 %iftmp.0.0
+}
+
+define i32 @test6(i32* nocapture %P) nounwind readonly {
+entry:
+; CHECK: test6:
+; CHECK: setl %al
+; CHECK: movzbl %al, %eax
+; CHECK: leal 4(%rax,%rax,8), %eax
+; CHECK: ret
+ %0 = load i32* %P, align 4 ; <i32> [#uses=1]
+ %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
+ %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1]
+ ret i32 %iftmp.0.0
+}
+
+
Removed: llvm/trunk/test/CodeGen/X86/select-no-cmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select-no-cmov.ll?rev=81822&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select-no-cmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select-no-cmov.ll (removed)
@@ -1,26 +0,0 @@
-; RUN: llc < %s | not grep cmov
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
-target triple = "i386-apple-darwin7"
-
-; Should compile to setcc | -2.
-; rdar://6668608
-define i32 @test(i32* nocapture %P) nounwind readonly {
-entry:
- %0 = load i32* %P, align 4 ; <i32> [#uses=1]
- %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %1, i32 -1, i32 -2 ; <i32> [#uses=1]
- ret i32 %iftmp.0.0
-}
-
-; setl %al
-; movzbl %al, %eax
-; leal 4(%eax,%eax,8), %eax
-define i32 @test2(i32* nocapture %P) nounwind readonly {
-entry:
- %0 = load i32* %P, align 4 ; <i32> [#uses=1]
- %1 = icmp sgt i32 %0, 41 ; <i1> [#uses=1]
- %iftmp.0.0 = select i1 %1, i32 4, i32 13 ; <i32> [#uses=1]
- ret i32 %iftmp.0.0
-}
-
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